VLSI_Class_Exam_I_2008

VLSI_Class_Exam_I_2008 - EEE 5322 VLSI Circuits and...

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EEE 5322 VLSI Circuits and Technology Exam I, 2008 Open Note, Open Book, 60 Minutes, 100 points TRUE FALSE(22 Points) NAME: . UFID: . Circle either TRUE or FALSE after each statement: A. As submicron technology nodes shrink, the IC designer should expect increased CMOS transistor threshold voltage, (V t ) variations. TRUE FALSE B. For “i” independent random inputs with mean and standard deviations, μ i and σ i The Total Standard Deviation is σ total = ( σ 1 + σ 2 + … σ i ) 0.5 TRUE FALSE C. The key Ion Implantation Specifications include Energy, Dose, Species, Current, and Electron Orbital Type. TRUE FALSE D. The error function, erf( ) can be directly related to the integral of the Gaussian Distribution. TRUE FALSE E. Boron is the primary P-type Dopant used in modern Silicon ICs. TRUE FALSE F. Phosphorous is the only N-type Dopant used in modern Silicon ICs. TRUE FALSE G. An ion-implanter is the preferred tool for of doping modern CMOS transistor junctions because the ion current and therefore the doping dose can be more precisely controlled the diffusion-based doping. TRUE FALSE H. Nuclear stopping is the only mechanism that receives the energy from implanted ions as they slow down and stop in the silicon lattice. TRUE FALSE I. The mean vertical depth through the substrate that dopant atoms reach before they come to rest is the projected range. TRUE FALSE J. The electrical quality of a volume of atoms in the silicon substrate volume right after they experience ion implantation is poor. TRUE FALSE K. Selective implantation is performed primarily to reduce the straggle that occurs during ion implantation. TRUE FALSE L. General dopant atoms undergo substitutional diffusion while many metal contaminants
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VLSI_Class_Exam_I_2008 - EEE 5322 VLSI Circuits and...

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