VLSI_Class_Exam_I_2010_Solution

VLSI_Class_Exam_I_2010_Solution - EEE 5322 VLSI Circuits...

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Unformatted text preview: EEE 5322 VLSI Circuits and Technology Exam I, 2010 Open Note, Open Book, 60 Minutes, 100 points Problem #1 Implantation (50 Points) NAME: Angler/W UF ID: . There are 2 Boron implants through the patterned wafer below. The implants are vertically down into the substrate. The first implant forms an LDD below the oxide spacer but the implant puts Boron everywhere. The P+ region implant is the second implant (which may be blocked by the oxide spacer) that puts the Boron ions through the thin oxide to form a P+ Source (or Drain) region. See the attached Boron implant range table in Silicon. Assume that the Boron implant statistics are the same in Oxide as in Silicon/Polysilicon. There is an N—type background doping concentration of 2 x1014/cm3 in the substrate. The LDD implant dose is 2 x1014/cm2 and the P+ Region implant dose is 5 x 1015/cm2. Thick Polysiiicon Height = 500nm Oxide Spacer, Height of 120 nm P+ Region Silicon Surface Interface Thin Oxide, Height of 25 nm Silicon substrate (500um thick) N-Type First Implant, LDD, dose is 2 x1014/cm2 a) What is the implant energy that you would use to put the peak Boron concentration at 200 nm below silicon surface interface under the oxide spacer? 7 — i/ b) At what distance(s) under thégttoénif the oxide spacer is the Boron dopant concentration equal to the N-type background doping concentration of 2 x10— 14/ 3 . . . . cm ? Calculate the distance from the s111con surface interface. . ~ . 5 ‘f/q M Second Implant, P+ Region, dose is 5 x 1015/cm2 , peak Boron concentration 40 nm below the silicon surface interface at the Thin Oxide region. , /é é- i/ , '3 Z n 147 / Sketch d) Sketch (rough drawing NOT a plot) the doping profile (P and N type) Under the thin oxide region in a graph on the next page. Show all key distances, concentrations and junctions. VLSI Exam 1, by William Eisenstadt Page 1 of 4 10/6/2010 Exuf A—rnge/r :7) /00ke\/ 4 mgev/ ('0’ 3200 " a2 2? :: /'07fg V gpz/Dflé' (Zfflm) Work page. .. 0) MP 0 .9: VLSI Exam I, by William Eisenstadt Page 2 of4 a 3237‘“ A (22370 Zwr/o'yconz' Alap =ao7/L/4 (M792_a07/£f>f3‘20—,27’z A lap = .0753 10/6/2010 V Problem #2 Diffusion, Sheet Resistance (50 Points) a) Below is a Si substrate with 15 nm of thermal oxide on top. A dose of 3x1013 cm'2 Boron atoms was into implanted into the Si wafer. The peak dose of the implant was at a positioned at 30 nm below the oxide—silicon surface. There is a 1x10" l4/cm3 n-type background doping in the silicon substrate. For the purposes of this diffusion calculation assume the whole implant dose is in the silicon wafer and very close to the Oxide 1 interface. The wafer undergoes 1.5 hour thermal diffusion step at 1100 C in a neutral ambient. Hint: If you look at J aeger Exercise 4.1 he calculates that D = 2.96 x 10'13cm2/sec for Boron at 1100 C. Assume no Boron enters or leaves the Si wafer. Also, assume that very little Boron dose is in the oxide. Oxide 1 (15nm thick) Silicon substrate (500um thick) a) How far does the doped p region extend below the oxide—substrate interface after the diffusion? There is a 1x10‘u4/cm3 n-type background doping. 23%,”, b) What is the average doping concentration level of the diffused p-region? , ’ X .0 0/ V 3 c) Using the Table below and the information aboee to estimate 553" sheet Resistivity R3 (= RD) of the diffused P region. "973/57 Ear? nihii it)“ 11316 mm mm Doping (£13.33 Work Page, VLSI Exam 1, by William Eisenstadt Page 3 of 4 10/6/2010 We 0 ,3 _ aligns.- gwp 0”) @— XI W'Z /"i3 av 7’4x/Daev .2 9409M g6 x] .4,- ‘\—l / M0 '3 3A no Ji-Jn {Aggy/3) = 2 _ / ’. ATLij 2, _, 4V1 I‘m/)k/SJ \/ fine A i‘mrfép/ Elma/bkfl/r'm's’éh E7 19 o}: 0 j: 44X fa"? 0 _ : “5 arm”: 350x gxm’a 5K7 “NV/D VLSIhExam I, by William Eisenstadt Page 4 of 4 10/6/2010 Table 6.9 Range statistics for boron in silicon and polysilicon Connery: Technology Modeling Associates (TMA). 0.1310 0.1368 0.1016 0.1462 0.1504 0.1505 0.1533 . . . 0.1019 0.0909 . 0.1053 0.0935 . . 0.1715 0.0957 . 0.1774 0.097: . 2.2473 0.1827 0.0990 .' . 3.6026 0.1375 0.1012 0.0344 0.1922 0.10211 ’ 921230 0:190: 0.1003 . 9.3025 0.2003 0.1056 . 10.1913 0.2040 (“068 . 10.5715 0.2074 0.1080 _ 10.9493 0.2107 0.1090 11.3207 0.2135 0.1100 . “.6980 0.11167 0.1 1 10 , 12.0592 0.2194 0.1119 1 12.0335 0.2221 0.1127 12.0050 0.2246 0.1146 . 13.7033 0.2303 0.1 163 .2 14.6027 0.2354 0.1175 15.4883 0.2401 0.1 192 . . 16.3661 0.21143 0.1200 . V 17.23158 0.21132 0.1215 111.1003 0.2517 0.1225 . 111.9535 02550 0.1235 19.3102 0.2530 0.1.252 21.4971 0.2635 0.20150 - ‘ 15.73 0.2060 0.2290 . 19,33 , 0.1290 0.2520 . 21.22 0.2520 w.“ ...
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This note was uploaded on 10/24/2011 for the course EEE 5322 taught by Professor W.r.eisenstadt during the Fall '10 term at University of Florida.

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VLSI_Class_Exam_I_2010_Solution - EEE 5322 VLSI Circuits...

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