Final prac Exam

Final prac Exam - Department of Electrical and Computer...

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Unformatted text preview: Department of Electrical and Computer Engineering The University of Texas at Austin EE 306, Fall, 2008 Yale Patt, Instructor TAs: Jeffrey Allan1 Arvind Chandrababu, Eiman Ebrahimi, Aravind .lakkani, Khubaib, Allison Korczynski, Pratyusha Nidamaluri, Zrinka Puljiz, Che—Chun Su, Christopher Wiley. Final Exam, December 10, 2008 Name: : O l (A-H‘ 0“ Problem 1 (20 points): Problem 2 (15 points): Problem 3 (10 points}: Problem 4 {15 points): Problem 5 (15 points): Problem 6 (20 points): Problem 7 (20 points): Total (115 points): —~*_—‘H_ contained in the space provided. Note: Please be sure your name is written legibly on each sheet of the exam. I will not cheat on this exam. Signature GOOD LUCK! Name: ;O Problem 1 (20 points) Part a (5 points): A main program puts a value in R0, and then calls SUB. What does the subroutine SUB do? Please answer in ten words or fewer. SUB ST R1, SaveRl ADD R1,R0,RO ADD R1,!“ !R1 Put answer here: ADD R1,R1,Rl 11100 110,110,120 R0 4.. '0 x R0 ADD 110,110,111 LD 111, SaveRl RET SaveRl .FILL x0 Part b (5 points): The MUX. select line labeled ADDRlMUX in the LC-3 Data Path is controlled by the output of the OR—gate shown below. Complete the wiring of the inputs to the OR—gate and the second input to the AND gate, to achieve the correct signal for ADDRlMUX. ' IR Register: 0001 0010 — 0011 0100 0101 0110 0111 1000 L_ 1001 1010 I: l_ AIHDRINHJX 1011 1100 1101 1110 1111 E" g__l 4—to—1 6 decoder Name: 60 the instruction from memory on its way to the IR. After decode has completed, some instructions load the MDR again, using the source 0 input to the mux labeled A on the data path. Other instructions ioad the MDR, using the source 1 input to mux A. Only one of the 15 LC-3 instructions loads the MDR after decode, using both source 0 and source 1 at different times during the processing of that instruction. What is the opcode of that instruction? Part d (5 points): You all know that with 5 bits, we can represent 32 different values. If the data type is unsigned integer, those values are the integers from 0 to +31. “Integer” is a special case of “fixed point number” where the binary point is “fixed” to be implicitiy to the right of the least significant bit. For example, 11001 really means 11001. which is equal to 25 (decimal). We can design a computer where we get to choose where the fixed point data type places the binary point. There are six choices. If b4b3b2blbo represents a binary string, those six choices are: 0.1)453b2blbo b4.bgbgb1b0 b4bg.b2b1b0 - b4b3b2.blbg b4b3b261.bg b4b3b2blbo. Suppose we wanted the difl'erence (subtraction) between adjacent values to be 1/4. Where would we place the binary point (Circle the correct representation above). What is the largest value that can he represented using this representation. Express as a decimal value. Name: it; l g 1h}; [‘5 Problem 2 (15 points): Part a (7 points): In the circuit below, the two master-slave flip flops (M80 and M81) each initially contain the value 0. That is, Q1=0, Q0=0. Please fill in the values of Q1 and Q0 after the end of each clock cycle in the table below. Namafiolndiaq Part b (8 points}: The following program starts execution at x3000 and stops after executing the HALT instruction. .URIG x3000 LD 30, Addri LEA R1, Addrl LDI R2, Addr2 ADD R1,R1,#—4 STR R1,R0,#73 STI R2,Addr4 HALT Addrl .FILL x3008 Addr2 .FILL x3009 Addra .FILL XOOOA Addr4 .FILL xsoOA .END Show the contents of R0 through R2 immediately after the ADD instruction in location x3003 executes. IE. . $oofi Show the contents of memory locations Addrl through Addr4 after the LC«3 halts. Memory Address Label Addrl Addr2 Addr3 Addrct Namezfip ETC) Y\. Problem 3 (10 points) __ _ The TRAP instruction requires seven states to carry out its instruction cycle, where each state takes one clock cycle. The seven states are shown as rows of the table below. Several control signals determine the processing in the data path during each of the seven clock cycles. Each control signal is shown as a column in the table. Note that the column labeled DR[2:O] is actually a three bit control signal identifying the destination register. We have provided the control signals for the first four clock cycles of processing the TRAP instruction, which correSponds to the FETCH and DECODE phases of the instruction cycle. Your job: complete the table by filling in the values of the control signals for clock cycles 5, 6, and 7. Note that if it does not matter whether a particular control signal is 1 or 0, we represent that fact with an X. Assume a memory access takes one clock cycle. Name: :9 Lidia“ Problem 4 (15 points): As you know, the LC—S ADD instruction adds 16—bit 2‘s complement integers. If we wanted to add 32-bit 2’s complement integers, we could do that with the program shown below. Note that the program requires calling subroutine X which stores into R0 the carry that results from adding R1 and R2. Your job: Fill in the missing pieces of both the program and the subroutine X, as identified by the empty boxes. Each empty box corresponds to one instruction or the operands of one instruction. Note that a 32-bit operand requires two 16-bit memory locations. A 32—bit operand Y has Y address A, and Y[31:16] stored in address A+1. .ORIG ADDING LABEL EXIT NUMl NUM2 RESULT SAVERé .END x3000 LEA R3, NUMl LEA 34, NUM2 LEA R5, RESULT LDR R1, R3, #0 LDR R2, R4, #0 ADD R0, R1, R2 STR R0 R5 #0 ADD R0, R1, R2 :S.Tm £1 Fi€>l Fajg-l +¥" TRAP x25 ST R4, SAVER4 AND RO, R0, #0 AND R4, R1, R2 ADD R1, R1, #0 BRn ADD {(2, £2, 4:}:0 I BRn ADDING Banp EXIT ADD R4, R1, R2 BRn err ADD R0, R0, #1 LD R4, SAVER4 RET .BLKW‘Z .BLKW 2 .BLKW 2 .BLKW 1 [15:0] stored in Name: e i [LSh‘L’ \— Problem 5 (15 points): An Aggie was asked to write a program that will do the following operation ten times: Wait For keyboard input until someone types a. character. Then, write that character to the screen. His solution is shown below. Note that his main program calls the subroutine INPUT ten times. The subroutine INPUT waits for key— board input. After obtaining keyboard input, it calls the subroutine OUTPUT to output that character to the screen. - There are no assembly time errors-in the program. However, there are three serious logical errors (the program does not work as intended). Describe them in the three boxes below. Please, no more than twenty words in each box. . BRIG x3000 n LD 121, SAVERI 33K? L00?“ (2109—5 no'i' use LOOP ADD R1, 111, #—1 . . ' JSR INPUT conch-hon OooLes 51+ it», {-399 BR]: LOOP “54¢ ! HALT “641°” ' INPUT sr'ar, SAVER? sr R1, srwsm BWAIT LDI_R1, KBSR BRzp BWAIT sT €n5+(K641'0f\ Du‘i' OUTPUT CioLLQrS LDI 111, KBDR . JSR OUTPUT {e'h‘ffl [m LE: *0 r IN?!) 1' subrqufiha. LD R1, SAVERI LD RT, SAVER? RET OUTPUT sr R7, SAVER? ADD R7, R1, #0 STI R7, DDR LD R7, SAVER? RET SAVERI .FILL XOOOA SAVER? .FILL x0000 KBSR .FILL xFEOO KBDR .FILL XFE02 DDR .FILL xFEOG .END Name: Sfll fife V\ Problem 6 (20 points): In this problem, you may assume memory initially contains the following values at the following addresses: Address Value x0180 x1000 x1000 xA802 x1001 x7180 x3002 XOFFF x3003 ' x3000 Your job here is to determine the values in the PC, R0, and R6 at the end of each of six successive instruction cycles. A single instruction executes in one instruction cycle. The values in PC, R0, R6, and XFEOO are initially as shown in the table below (i.e., before the start of the first instruction cycle). The contents of XFEOD are also shown at the end of each instruction cycle. Please fill in the missing values in the table. x4000 xFEOO x0000 Namafifl Dfl _ ProbIem 7 (20 points): An LC—3 program starts execution at x3000. During the execution of the program, a snapshot of all 8 registers were taken at six different times as shown below: before the program executes, after execution of instruction 1, after execution of instruction 2, after execution of instruction 3, after execution of instruction 4, after execution of instruction 5, and after execution of instruction 6. Registers After 6th Instruction Also, during the execution of the program, the PC trace, the MAR trace, and the MDR trace were also recorded as shown below. Note that a PC trace records the addresses of the instructions executed in sequence by the program. ' Your job: Fill in the missing entries in the 3 tables above. 10' ...
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This note was uploaded on 10/24/2011 for the course EE 306 taught by Professor Ambler during the Fall '07 term at University of Texas.

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Final prac Exam - Department of Electrical and Computer...

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