fa10-lw-s2 - ECE 2030C 2:00 p.m. Computer Engineering 4...

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ECE 2030C 2:00 p.m. Computer Engineering Fall 2010 4 problems, 5 pages Exam Two Solution 27 October 2010 Problem 1 (3 parts, 21 points) State Part A (8 points) Implement a transparent latch using only inverters and pass gates. Label the inputs In and En , and output Out . Part B (7 points) Consider a register with a selectable write enable (WE) and read enable (RE). It is implemented with transparent latches, a 2 to 1 mux, and a pass gate. Describe its behavior by completing the output values. Also indicate when a write and/or a read is being performed. Register IN OUT WE RE φ 1 φ 2 IN WE RE CLK OUT write? read? A 0 0 ↑↓ Zo A 1 0 ↑↓ Zo A 0 1 ↑↓ Qo A 1 1 ↑↓ A Part C (6 points) Assume the following signals are applied to a register with write enable Draw the output signal Out . Draw a vertical line where In is sampled. Draw crosshatch where Out is unknown. Φ 1 Φ 2 WE In Out 1
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ECE 2030C 2:00 p.m. Computer Engineering Fall 2010 4 problems, 5 pages Exam Two Solution 27 October 2010 Problem 2 (4 parts, 40 points) Part A (10 points) Convert the following notations: decimal notation binary notation 327 101000111 37.5625 100101.1001 44.125 101100.001
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This note was uploaded on 10/26/2011 for the course ECE 2030 taught by Professor Wolf during the Spring '07 term at Georgia Institute of Technology.

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fa10-lw-s2 - ECE 2030C 2:00 p.m. Computer Engineering 4...

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