GateDesign - Draft Draft Draft Designing Computer Systems...

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Draft Draft Draft Designing Computer Systems Gate Design 06:35:40 PM 7 September 2010 GD-1 © Scott & Linda Wills
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Draft Draft Draft Designing Computer Systems Gate Design Logical functions that are specified in Boolean algebra, can be implemented with switches and wire. The resulting designs are often the fastest and most efficient implementations possible. But the time and effort required for design is often greater. And switch design requires the manipulating the desired expression so that only input variables are complemented (no big bars). Often after the design process, the desired expression is lost. Is there a way to implement a Boolean expression quickly, without distorting the expression? Yes! We can simplify the design process by using more powerful components. We'll work with gates , building blocks that match the logical operations in our expression. Wires still connect outputs to inputs. Data still is digital. In fact, we use switches to implement these new gate abstractions. Suppose we want to implement the expression Out = (A + B) · C . Using switches, details of the implementation technology (e.g., P-type switches are active low and pull high) are visible and affect the design. Using gates, technology details are hidden and the desired expression is easily discerned. Unfortunately this gate design is twice as slow and uses twice as many switches. Convenience has a cost! Of course, gate design can be improved if the choice of implementation components is not tied to the desired expression. For CMOS technology, NAND and NOR gates require fewer switches than AND and OR. So in this example, the OR and AND gates can be replaced by NOR gates. Unfortunately, this requires DeMorgan transformations of the desired expression. This distorts the 06:35:40 PM 7 September 2010 GD-2 © Scott & Linda Wills
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Draft Draft Draft expression, increases design time, and increases the possibility for errors. Why can't we leave the expression alone? We can. DeMorgan's square suggests that all gate types have two equivalent
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This note was uploaded on 10/26/2011 for the course ECE 2030 taught by Professor Wolf during the Spring '07 term at Georgia Tech.

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GateDesign - Draft Draft Draft Designing Computer Systems...

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