hwk5 - SR 00 01 11 10 00 Q 2) Draw the schematic for a 3...

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ECE 2030 Homework 5 Due Thurs. February 26 1) Give a truth table that shows all the stable operating states for this circuit. S Q Q R Consider the following sequence for S and R. SR = 00, SR = 01, SR = 11, SR = 10, SR = 00 Fill in the corresponding output for Q into the table.
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Unformatted text preview: SR 00 01 11 10 00 Q 2) Draw the schematic for a 3 bit adder/subtractor including the add/subtract bit and the error checking. 3) Draw the following timing diagram: L IN OUT L 1 2 1 2 IN A OUT...
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This note was uploaded on 10/26/2011 for the course ECE 2030 taught by Professor Wolf during the Spring '07 term at Georgia Institute of Technology.

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