sp11-sw-sf - ECE 2030 A 11:00pm Computer Engineering Spring...

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Unformatted text preview: ECE 2030 A 11:00pm Computer Engineering Spring 2011 5 problems, 5 pages Final Exam Solution 6 May 2011 Problem 1 (3 parts, 21 points) A chip off the old block Part A (15 points) Consider the five definitions for the block drawn below. One block input is the logical value A . The other input is the control value C . The output behavior for each of the five definitions is given in the table. Complete the full truth table and state the logical (gate) names for each definition. (hint: the first block one appears to mask A when its control input is low.) I N A C Out In C i A A A A Z o A 1 A A 1 A In C i 1 Z o 1 1 1 Z o 1 1 1 1 1 1 1 1 i AND XOR NOR OR Pass Gate Part B (6 points) The circuit below is built using these blocks. Describe its behavior. Also give the circuits common name. X Y i Out I N C O I N C O I N C O I N C O I N C O i X Y Out Q 1 Q 1 1 1 1 It's a transparent latch 1 ECE 2030 A 11:00pm Computer Engineering Spring 2011 5 problems, 5 pages Final Exam Solution 6 May 2011 Problem 2 (4 parts, 32 points) Design Fun Complete each design below. Be sure to label all signals. Part A: Complete the following CMOS design. Also express its behavior. Out = A B C D E Part B: Derive the proper mixed logic expression for the following design. Determine # of switches needed. Out = A B C D # switches = 3 x 4 + 2 x 2 = 12 + 4 = 16T Part C: Implement a toggle cell using required latches and basics gates (including XORs). Also complete the behavior table....
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This note was uploaded on 10/26/2011 for the course ECE 2030 taught by Professor Wolf during the Spring '07 term at Georgia Institute of Technology.

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sp11-sw-sf - ECE 2030 A 11:00pm Computer Engineering Spring...

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