Spring05_Test2_sol

Spring05_Test2_sol - Spmho‘ Boos EC)? 0103/0 Tm o1 / Dc,...

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Unformatted text preview: Spmho‘ Boos EC)? 0103/0 Tm o1 / Dc, Hedi Problem 1 (12 Points): a) Determine the IEEE single precision floating point representation of 2.875 :I‘OH/XQI W‘men’i [+197 : [000 (3000 [o 1 F1 "'~~—~———-‘ is ~zn “ " -M__‘__ 1 f» ‘ "wa'flww "‘J":;,;v ___‘,,.._,_M.,... Answer 0000 ‘0 ‘3 i 'r 000, 0000 0000 0000 Done b) Find the value of the IEEE single precision floating point representation. 41100 0001 11101 0000 0000 0000 0000 0009 l e— {3101 WK it 1000001 1*: Igllo Sub—Wad“ [snag +0 317+ </ _ ‘ I frail/w Relcl its i010._5’0 ai'jnnlxmml is NO' wrung": H0192: gag, Answer ”‘ OJ ‘1? (‘h odt, POP“ Problem 1 (12 Points): 21) Determine the IEEE single precision floating point representation of _. - v i ‘ '1 2.125“) _ [0905‘ , LOO D, x a 5700 .QJXIDW‘ b/ la"? reset 3373 01000 c003 0001 Ccococcooccc. 19::va ac ' g u a , Answer—DIDQOUUQOOOI._0§_O_OODOO 0000 0000 0000 b) Find the value of the [BBB single precision floating point representation. 1100 0001 1110 0000 0000 0000 0000 0000 _TL__.__—j:___x \ “36¢?” Mfmen-‘r «(my D WOODDJI'Z [3| I‘QMOV‘L baa; +0 36 4/ pfiacfiifcm '13 \\ Q _~ ._. Q 30 iflhici (NJ gs ’' H Answer E ‘ 2 /\|!><;K/ 2.111001: Q8 Problem 2 (38 Points): ), a) Draw the schematic of a fill] adder using basic gates. b) Use a decoder to implement the following logic. FABC==Zm(0,2,4), GABC=AB ‘ = NSC + Ab Q {M1 (O) F d) Fill in the truth table for a priority encoder with D1>D0>D2>D3 Problem 2 (38 Points): 0‘ (L‘i‘C‘ I (9 (LB a) Draw the schematic of a full adder using basic gates. 5) Use a decoder to implement the following logic. FABC=Zm(0,2,3), GABC=AB = A5 C "r A E C = ZMCwfl) OLHQAna‘giL d) Fill in the truth table for a priority encoder with D3>D0>D1>D2 D3 D2 D1 D0 3 Problem ,4 (20 Points): ' 21) Draw a schematic for a D latch using either basic gates or transmission gates. EM b) Complete the timing diagram for the following circuit. Assume that all initial stored bits are zero. Problele (30 Points): Consider the following logic. Inputs: A and B, Output: C. States 00, 01, 10. The transition from State 00 to State 10 occurs when AB = 11; the corresponding output is C = 1. The transition from State 10 to State 01 occurs when AB = 01; the corresponding output is C = 0. The transition from State 01 to State 00 occurs when AB = 10; the corresponding output is C = 0. The rest of the inputs cause the states to remain the same and the output C to be 0. a) Draw a state transition diagram for this logic. Mark all the arcs with the appropriate inputs and outputs. b) Fill in the truth table for the combinational circuit. c) Design and draw the entire schematic for the statemachine. ‘% OX)HO 0 0 0 / C) L, To )lo (3an -ol 0 g g: ;.:_ b . g. ==p a: " -. ‘4 ® <0 a i \‘QNVRR Problem 4 (30 Points): Consider the following logic. Inputs: A and B, Output: C. States 00, 01, 10. The transition from State 00 to State 10 occurs when AB = 11; the corresponding output is C = l. The transition from State 10 to State 01 occurs when AB = 10; the corresponding output is C = l. The transition from State 01 to State 00 occurs when AB = 01; the corresponding output is C = l. The rest of the inputs cause the states to remain the same and the output C to be 0. a) Draw a state transition diagram for this logic. Mark all the arcs with the appropriate inputs and outputs. b) Fill in the truth table for the combinational circuit. 0) Design and draw the entire schematic for the state machine. l m 10 11 100i 11 1 11 xxll a) C: ZMOQ/S r0) Msrzmogéwl Mg. gyro/<1 )5) ID) O 0> 0w 0 OLD m 0 CO 0000 O O O 0 COO OO O COCO ...
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Spring05_Test2_sol - Spmho‘ Boos EC)? 0103/0 Tm o1 / Dc,...

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