{[ promptMessage ]}

Bookmark it

{[ promptMessage ]}

su01-rd-sf

su01-rd-sf - STUDENT NAME(PLEASE PRINT CLEARLY Georgia...

This preview shows pages 1–5. Sign up to view the full content.

STUDENT NAME: (PLEASE PRINT CLEARLY) REMARKS: 1. All questions should be answered (in the space provided). 2. Books and notes may NOT be used. 3. Calculators are allowed. 4. You are allowed two 8.5”x11” crib sheets. 5. The exam is 2 hours and 50 minutes. DATE: August 1, 2001 TIME: 11:30 p.m. - 2:20 p.m. Marks: Total: Q1 Q2 Q3 Q4 v. 1.0 - 1 of 10 - Georgia Institute of Technology Department of Electrical and Computer Engineering Final Exam ECE2030: Introduction to Computer Engineering Q5 Q6 Q7 Q8 /100 /10 /12 /10 /13 /15 /10 /15 /15

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
ECE2030 Final Exam (continued) v. 1.0 - 2 of 10 - 1. SWITCH DESIGN (MAX MARK: 10) For the two expressions below, create a switch level implementation using nMOS and pMOS transistors. Assume that you also have the complements of each input. Out 1 A B C D + ( 29 + = Out 2 A BC D + ( 29 E + = B C B D A V DD A Out 1 D C B C B D A V DD A Out 2 D C E E
ECE2030 Final Exam (continued) v. 1.0 - 3 of 10 - 2. MIXED LOGIC (MAX MARK: 12) a) Using mixed-logic notation, implement both of the following Boolean functions together in one logic cir- cuit diagram. The final implementation should be implemented only with NOR gates and inverters. Do not assume that the complemented versions of inputs are available. b) What are the above implemented Boolean functions using only NOR and complement operations? Out 1 AB C D + ( 29 E + = Out 2 AB E + = A B C D E Out 1 Out 2 Out 1 A B + C D + E + + = Out 2 A B + E + =

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
ECE2030 Final Exam (continued) v. 1.0 - 4 of 10 - 3. BOOLEAN SIMPLIFICATION (MAX MARK: 10) For the following Karnaugh map, derive a simplified product of sums ( POS ) expression. Be sure to circle and list the prime implicants, indicating which are essential. Write the simplified POS expression in the space below. 4. INSTRUCTION SET ARCHITECTURE (MAX MARK: 10) Suppose that you have a datapath similar to the one discussed in class exept that it has only 8 registers. Also, suppose that you wish to design the processor to be able to handle 80 instruction types (i.e. and, or, andi, add, addi, etc.). Finally, suppse that you require immediate operands to have a range of . Determine the following values for the resulting instruction format that would need to be implemented. For the last two questions, assume the same basic instruction layout as discussed in class exept for the appropriate modifica- tions as required by the above description.
This is the end of the preview. Sign up to access the rest of the document.

{[ snackBarMessage ]}