Unformatted text preview: Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.976 High Speed Communication Circuits and Systems Spring 2003 Homework #3: Amplifier Noise and Nonlinearity c Copyright 2003 by Michael H. Perrott Reading: Chapter 10 and pages 272284 & 295300 of Thomas H. Lee's book. Pages 1122 and 3843 of Behzad Razavi's book. 1. The following is based on Problem 5 in Chapter 11 of Thomas Lee's book. Consider the resistively shunted amplifier shown in Figure 1. Vdd =1.8 volts, Ibias = 200A, RL = 1k. Ibias RL Vout 2 0.18 M2 50 Vin Cbig1 RT Cbig2 M1 10 0.18 Figure 1: Amplifier with resistive input termination. (a) Assuming all transistors are in saturation: i. What voltage is Vout biased at? How much current flows through M2 ? ii. Using Hspice, find gm and Cgs for M1 with 0.18 m Hspice model file provided in Athena in the file /mit/6.976/Models/0.18u/mos018.mod. (b) Assuming that Cbig1 and Cbig2 are short circuits at the frequencies of interest, redraw a simplified version Figure 1 for calculating the noise figure of the amplifier. 1 (c) Given the assumption in part (b), does the bias transistor M2 impact the noise figure of the amplifier? (d) Derive an expression for the noise figure (factor) of the amplifier. Assumme that all transistors are in saturation, and ignore the impact of gate noise, Cgd , ro , and source/drain capacitances in M2 . Also assume for M2 that i2 = 4kT gdo f, gm /Cgs = wT , nd where the excess noise factor = 3 and = 0.5. (e) Based on your expression in part (d): i. Is the noise figure a function of frequency? If so, is the noise performance of the amplifier better at high or low frequencies? ii. Is the noise figure of the amplifier minimized for RT 50? RT iv. What is the noise figure for RT = 50 with
wT w 50, RT = 50, or
wT w iii. What is the minimum noise figure that can be achieved with = 10? = 10? (f) Rederive the expression for noise figure (factor) of the amplifier under the same conditions as in part (d) except that you should now include the impact of gate noise. Assume that the gate noise is described as:
2 i2 = 4kT gg f, where gg = w2 Cgs /(5 gdo ), ng where the gate noise coefficient = 6. Also assume that gate noise is correlated with drain noise as: ing i nd c= = j0.55 2 i 2 ing nd (g) Is the noise figure a function of frequency? If so, is the noise performance of the amplifier better at high or low frequencies? (h) What is the noise figure for RT = 50, wT = 10? w 2 2. Now consider the resistively shunted amplifier employing a cascode transistor as shown in Figure 2. For the questions below, assume that all transistors are in saturation and T . Ignore the impact of gate noise, Cgd , ro , and source/drain capacitances in M2 and M3 . Also assume for M2 and M3 that i2 = 4kT gdo f, gm /Cgs = wT , nd RL Ibias Vbias RT M2 Cbig1 Cbig2 M1 M3 Vout 10 0.18 2 0.18 10 0.18 Cpar 50 Vin Figure 2: Cascoded amplifier with resistive input termination. (a) From an intuitive perspective, what is the impact of M3 on the overall noise figure of the amplifier if Cpar = 0? Justify your answer. (b) Also from an intuitive perspective, how does Cpar impact the overall noise figure as its value is increased above zero? Justify your answer. (c) Derive an expression for the noise figure (factor) of the cascoded amplifier assum ing Cpar is nonzero. 3. This problem focuses on estimating IIP3 and IIP2 for the singleended and differential amplifiers shown in Figure 3. (a) Enter each of the circuits into Cadence and perform a DC sweep using Hspice for each one as follows: i. Circuit (a): sweep Vin over the range of 10 mV to 10 mV. Be sure to probe node Vout . ii. Circuit (b): sweep Vid over the range of 20 mV to 20 mV. Be sure to probe node Vod . (b) Use Matlab to curve fit a third order polynomial to each of the Hspice plots obtained in part (a). Specifically, derive the coefficients for the following polyno mials: 3 1.8 V 1 k 1 k Vod 1.8 V Ibias=0.5 mA 1 k Vout 10 0.18 M1 (a) Vbias=1.2 V 0V (b) Ibias=1mA Vid 2 Vin Vin+ M1 10 0.18 10 0.18 M2 Vin Vid 2 10 0.18 0V M2 Figure 3: Example amplifiers for nonlinearity analysis: (a) singleended, (b) differential.
2 3 i. Circuit (a): Vout co + c1 Vin + c2 Vin + c3 Vin , 2 3 ii. Circuit (b): Vod co + c1 Vid + c2 Vid + c3 Vid . To do so, create matrices (for circuit (a) in this case): Vout [i] y= Vout [i + 1] . . . . . . , A = . . . . . . . . . . . . 2 3 1 Vin [i] Vin [i] Vin [i] 2 3 1 Vin [i + 1] Vin [i + 1] Vin [i + 1] . . . . . . . . . . . . c0 c1 , h = c2 c3 so that we have the matrix relationship: y = Ah. We solve for the coefficients in vector h using the least squares technique by using the Matlab command: h = A\y (c) Plot the calculated polynomial versus the Hspice computed curves for Vout and Vod over the range of Vin and Vid , respectively, specified in part (a). How well does the polynomial match its respective simulation curve? (d) Given the computed coefficents from part (b), calculate IIP3 for both amplifiers assuming that the amplifiers are shunt loaded at their inputs with a 50 resistor, and are also driven by a source with 50 source resistance (just as in problems (1), (2) and (4)). Does one have higher IIP3 than the other? If so, why? (e) Given the computed coefficents from part (b), calculate IIP2 for both amplifiers under the same assumptions as in part (c). Does one have higher IIP2 than the other? If so, why? 4 4. In this problem we will use CppSim to "experimentally" calculate IIP3 of the amplifier shown in Figure 4. Assume that: co = .5, c1 = 1, c2 = .03, c3 = .07 Amplifier 50 Vin x Vout 50 2 3 Vout = co + c1x + c2x + c3x Figure 4: Amplifier configuration for CppSim Simulation. (a) What is the theoretical value of IIP3 of the amplifier given the coefficents above? (b) Create an amplifier module symbol and schematic in CppSim that contains pa rameters for co , c1 , c2 , and c3 . Create a corresponding module entry in the modules.par file that implements the amplifier using the Amp class. Refer to /mit/CppSim/Doc/cppsimdoc.pdf for Amp Class usage and creating modules in Cadence. Turn in the module symbol and code for Amp. (c) Create a gain module symbol and schematic in CppSim that contains a parameter for the gain value. Set up the parameters so that you use the gain module already in modules.par. Turn in the module symbol. (d) Create a schematic in Cadence using the above modules as shown in Figure 5. Set the signal source signal type to a sine wave of frequency 1 GHz. Create a test.par file corresponding to the circuit that specifies a sample rate of 50 GHz and the number of sample points as 10000.
constant out signal_source phase out gain in out x amplifier in out vout Figure 5: CppSim schematic for IIP3 computation. Now, "experimentally" calculate IIP3 for the amplifier by adjusting the gain value over several appropriately chosen values and then measuring the resulting funda mental and third order distortion products (observe these products by taking the fft of the output of the amplifier and then measuring the appropriate tone amplitudes in the frequency domain). Does your IIP3 estimate agree with the theoretical calculation in part (a)? (NOTE: in the future, do this as a two tone test rather than a one tone test) 5 ...
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This note was uploaded on 10/29/2011 for the course EE 6.976 taught by Professor Michaelperrott during the Spring '03 term at MIT.
 Spring '03
 MICHAELPERROTT
 Amplifier

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