lec1 - 6.976 High Speed Communication Circuits and Systems...

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Unformatted text preview: 6.976 High Speed Communication Circuits and Systems Lecture 1 Overview of Course Michael Perrott Massachusetts Institute of Technology Copyright © 2003 by Michael H. Perrott Wireless Systems Direct conversion architecture D/A Digital Processing Block D/A Transmit IC Receive IC sin(wot) 90o Power Amp LNA sin(wot) 90o A/D A/D Digital Processing Block Transmitter issues - Meeting the spectral mask (LO phase noise & feedthrough, quadrature accuracy), D/A accuracy, power amp linearity Receiver Issues - Meeting SNR (Noise figure, blocking performance, channel selectivity, LO phase noise, A/D nonlinearity and noise), selectivity (filtering), and emission requirements MIT OCW M.H. Perrott Future Goals Low cost, low power, and small area solutions - New architectures and circuits! Increased spectral efficiency - Example: GSM cellphones (GMSK) to 8-PSK (Edge) Requires a linear power amplifier! Increased data rates - Example: 802.11b (11 Mb/s) to 802.11a (> 50 Mb/s) GFSK modulation changes to OFDM modulation Higher carrier frequencies New modulation formats New application areas M.H. Perrott - 802.11b (2.5 GHz) to 802.11a (5 GHz) to ? (60 GHz) - GMSK, CDMA, OFDM, pulse position modulation MIT OCW High Speed Data Links A common architecture Digital Processing Block MUX Driver 10 Gb/s Data Link Amp Clock and Data Recovery DEMUX Clock Generation Clock Distribution Digital Processing Block Transmit IC Receive IC Transmitter Issues - Intersymbol interference (limited bandwidth of IC amplifiers, packaging), clock jitter, power, area Receiver Issue - Intersymbol interference (same as above), jitter from clock and data recovery, power, area MIT OCW M.H. Perrott Future Goals Low cost, low power, small area solutions - New architectures and circuits! Increased data rates - 40 Gb/s for optical (moving to 120 Gb/s!) Electronics is a limitation (optical issues getting significant) - > 5 Gb/s for backplane applications The channel (i.e., the PC board trace) is the limitation High frequency compensation/equalization - Higher data rates, lower bit error rates (BER), improved robustness in the face of varying conditions - How do you do this at GHz speeds? - Better spectral efficiency (more bits in given bandwidth) MIT OCW Multi-level modulation M.H. Perrott This Class Circuit AND system focus - Knowing circuit design is not enough - Knowing system theory is not enough - RF issues: transmission lines and impedance transformers - High speed design techniques - Basic building blocks: amplifiers, mixers, VCO’s, digital components - Nonidealities: noise and nonlinearity - Macromodeling and simulation - Wireless and high speed data link principles - System level blocks: PLL’s, CDR’s, transceivers MIT OCW Circuit stuff System stuff M.H. Perrott The Goal – Design at Circuit/System Level 1. 2. 3. 4. 5. 6. Design architecture with analytical models May require new circuits – guess what they look like Verify architectural ideas by simulating with ideal macro-models of circuit blocks Guess macro-models for new circuits Add known non-idealities of circuit blocks (nonlinearity, noise, offsets, etc.) Go back to 1. if the architecture breaks! Design circuit blocks and get better macro-models Go back to 1. if you can’t build the circuit! Go back to 1. if the architecture breaks! Verify as much of system as possible with SPICE Layout, extract, verify Do this soon for high speed systems - iteration likely! MIT OCW M.H. Perrott Key System Level Simulation Needs You need a fast simulator - To design new things well, you must be able to iterate - The faster the simulation, the faster you can iterate - Fundamental issues with architectures need to be separated from implementation issues An architecture that is fundamentally flawed should be quickly abandoned You need to be able to add non-idealities in a controlled manner You need flexibility - Capable of implementing circuit blocks such as filters, VCO’s, etc. - Capable of implementing algorithms - Arbitrary level of detail MIT OCW M.H. Perrott A Custom C++ Simulator Will Be Used - CppSim Blocks are implemented with C/C++ code - High computation speed - Complex block descriptions same CAD framework Users enter designs in graphical form using Cadence schematic capture - System analysis and transistor level analysis in the - Powerful post-processing and viewing capability Resulting signals are viewed in Matlab Note: Hspice used for circuit level simulations CppSim is on Athena and freely downloadable at http://www-mtl.mit.edu/~perrott M.H. Perrott MIT OCW A Quick Preview of Homeworks and Projects HW1 – Transmission Lines and Transformers High speed data link application: High Speed Trace (RF Connector to Chip Die) package Connector Adjoining pins Controlled Impedance PCB trace die Driving Source Two-Port Model On-Chip Delay = x Characteristic Impedance = Ro Ro Ei1 L1 C1 C2 Ei2 Er2 Vin Er1 Ideal Transmission Line RL Vout M.H. Perrott MIT OCW HW2 – High Speed Amplifiers Broadband R1 VoIbias Vin+ M1 M2 R2 Vo+ Vin- Narrowband Ibias = 1mA 5 kΩ M3 50 Ω Cbig Zin x Lg M1 Ls Ld Vout M2 CL=1pF M3 M4 Vin M.H. Perrott MIT OCW HW3 – Amplifier Noise and Nonlinearity Amplifier circuit Ibias RL Vout 2 0.18 M2 50 Ω Vin Cbig1 RT Cbig2 M1 10 0.18 Model Noise Nonlinearity Vout 50 Ω 50 Ω Vin Vout = co + c1x + c2x2 + c3x3 M.H. Perrott MIT OCW HW4 – Low Noise Amplifiers and Mixers Narrowband LNA Ibias = 1mA 5 kΩ Cbig 50 Ω Vin Cbig Zin Lg Rpg M1 Rps Ls Ld Rpd M2 Vout CL=1pF M3 Rps Passive Mixer RS/2 Cbig Vdd 0 LO Vin Vout LO CL RL/2 RL/2 0V Vdd Vout LO LO M.H. Perrott RS/2 Cbig 0 MIT OCW HW5 – Voltage Controlled Oscillators Differential CMOS 1.8 V 100/0.18 M3 Ctune Vout Vin 3 nH 50/0.18 0V M2 M1 50/0.18 Vout Ld=4nH Rd=10kΩ Vout M1 C1=2pF M4 100/0.18 Colpitts Vbias=1.2V Ibias=100 µA C2=8pF M.H. Perrott MIT OCW Project 1 - High Speed Frequency Dividers High speed latches/registers High speed dual-modulus divider 2/3 Load OUT Load OUT IN 2/3 Core A 2 B 2 OUT IN IN CON* CON Control Qualifier Φ Φ 8 + CON Cycles IN A B OUT CON* CON M.H. Perrott MIT OCW HW6 – Phase Locked Loop Design T Integer-N synthesizer PFD T ref(t) e(t) Icp Loop Filter vin(t) VCO out(t) div(t) Divider N[k] = Nnom Phase noise simulation SΦout(f) vin out K1 dBc/Hz s 1 + s/(2πfp) K2 dBc -20 dBc/Hz/dec t out(t) = cos(2π (fo+Kvvin(τ))dτ) vph 2 vspur = Asin(2πfst) 0 fs fp foffset M.H. Perrott MIT OCW Project 2 – GMSK Transmitter for Wireless Apps Reference Frequency (100 MHz) PFD T Loop Filter Icp H(s) vin(t) out(t) Power Amp RF Transmit Spectrum Trans. Noise Kv = 30 MHz/V fo = 900 MHz Limit Amp 90 Q I o 0 fRF f N Digital I/Q Generation Td T T t Gaussian f inst LPF Data Eye t 1 1 MHz Peak-to-Peak Frequency Deviation t K ph 1-z -1 Data Generator Φ cos( Φ ) D/A sin( Φ ) D/A Instantaneous Frequency Includes Zero-Order Hold Td = M.H. Perrott MIT OCW Project 2 – Accompanying Receiver Receiver Noise Received Spectrum Trans. Noise fRF f Band Select Filter Channel Select Filter Baseband Spectrum S ( IR+j QR) IR Modulation Signal Receiver Noise Transmitter Noise NR f LNA cos(2πfRFt) sin(2πfRFt) 0 fRF f QR M.H. Perrott MIT OCW Basics of Digital Communication Example: A High Speed Backplane Data Link Suppose we consider packaging issues at the receiver side (ignore transmitter packaging now for simplicity) Transmitter 100 Ω 100 Ω Vo+ Ibias Vin+ M1 M2 VinControlled Impedance PCB trace Receiver package Adjoining pins die M3 M4 Driving Source Two-Port Model Ideal Transmission Line Ei1 Delay = 110 ps Characteristic Impedance = 50 Ω On-Chip 100 Ω Vin Er1 1 nH Ei2 Er2 0.5 pF 0.5 pF 55 Ω Vout intentional mismatch unintentional mismatch M.H. Perrott MIT OCW Modulation Format Binary, Non-Return to Zero (NRZ), Pulse Amplitude Modulation (PAM) - Send either a zero or one in a given time interval T - Time interval set by a low jitter clock - Ideal signal from transmitter: 0.4 0.35 0.3 0.25 d 0.2 in 0.15 0.1 0.05 0 −0.05 0 0.5 1 TIME 1.5 2 x 10 2.5 −8 M.H. Perrott MIT OCW Receiver Function Two operations - Recover clock and use it to sample data - Evaluate data to be 0 or 1 based on a slicer Detector Data Out Clock Recovery Sampling Instant Slice Level Data Recovered Clock Recovered Clock 0111000101001 M.H. Perrott Out MIT OCW Issue: PC Board Trace is Not an Ideal Channel Chip capacitance and inductance limits bandwidth Transmission line effects cause reflections in the presence of impedance mismatch Example: transmit at 1 Gb/s across link in previous slide (assume bondwire inductance is zero) - Signal at receiver termination resistor 0.4 0.35 0.3 0.25 0.2 out 0.15 0.1 0.05 0 −0.05 0 0.5 1 TIME 1.5 2 x 10 2.5 −8 M.H. Perrott MIT OCW Eye Diagram for 1 Gb/s Data Rate Wrap signal back onto itself every 2*Td seconds - Same as an oscilloscope would do Eye Diagram 0.4 Allows immediate assessment of the quality of the signal at the receiver (look at eye opening) 0.35 0.3 0.25 0.2 out 0.15 0.1 0.05 0 −0.05 0 0.2 0.4 0.6 0.8 1 1.2 Time (seconds) 1.4 1.6 1.8 x 10 2 −9 M.H. Perrott MIT OCW Relationship of Eye to Sampling Time and Slice Level Horizontal portion of eye indicates sensitivity to timing jitter Vertical portion of eye indicates sensitivity to additional noise and ISI Sampling Instant 0.4 Eye Diagram 0.35 0.3 0.25 Slice Level out 0.2 0.15 0.1 0.05 0 0.05 0 0.2 0.4 0.6 0.8 1 1.2 Time (seconds) 1.4 1.6 1.8 x 10 9 2 M.H. Perrott MIT OCW What Happens if We Increase the Data Rate? Limited bandwidth and reflections cause intersymbol interference (ISI) Eye diagram at 10 Gb/s for same data link Eye Diagram 0.6 0.5 0.4 0.3 out 0.2 0.1 0 −0.1 0 1 Time (seconds) 2 x 10 −10 M.H. Perrott MIT OCW What is the Impact of the Bondwire Inductance? Rule of thumb: 1 nH/mm for bondwire - Assume 1 nH 0.6 Impact of inductance here increases bandwidth - less ISI occurs 0.5 0.4 Eye Diagram 0.3 out 0.2 0.1 0 −0.1 0 1 Time (seconds) 2 x 10 −10 M.H. Perrott MIT OCW How High of a Data Rate Can The Channel Support? Raise it to 25 Gb/s Eye Diagram 0.6 0.5 0.4 0.3 out 0.2 0.1 0 −0.1 0 2 4 Time (seconds) 6 x 10 8 −11 However, we haven’t considered other issues - PC board trace attenuates severely at high frequencies Bandwidth is < 5 GHz for 48 inch PC board trace (FR4) MIT OCW M.H. Perrott Multi-Level Signaling Increase spectral efficiency by sending more than one bit during a symbol interval - Example: 4-Level PAM at 12.5 Gb/s on same channel Effective data rate: 25 Gb/s Eye Diagram 0.5 0.4 0.3 0.2 out 0.1 0 −0.1 −0.2 0 0.2 0.4 0.6 0.8 Time (seconds) 1 1.2 1.4 x 10 1.6 −10 M.H. Perrott MIT OCW How Else Can We Reduce ISI? Consider a system level view of the link - Channel can be viewed as having an equivalent frequency response Assumes linearity and time-invariance (accurate for most transmission line systems) Transmitter Channel Receiver Transmitter Driver Receiver Detector M.H. Perrott MIT OCW Equalization Undo channel frequency response with an inverse filter at the receiver - Removes ISI! - Can make it adaptive to learn channel Transmitter Channel Receiver Equalization Receiver Detector Transmitter Driver M.H. Perrott MIT OCW The Catch Equalization enhances noise - Overall SNR may be reduced Optimal approach is to make ISI and noise degradation about equal Transmitter Channel Transmitter Driver Noise Receiver Equalization Receiver Detector M.H. Perrott MIT OCW Alternative – Pre-emphasize at Transmitter Put inverse filter at transmitter instead of receiver - No enhancement of noise, but … - Need feedback from receiver to learn channel - Requires higher dynamic range/power from transmitter Trransmitter Compensation (Pre-emphasis) Channel Noise Receiver Detector Receiver Transmitter Driver M.H. Perrott MIT OCW Best Overall Performance Combine compensation and equalization - Starting to see this for high speed links Trransmitter Compensation (Pre-emphasis) Transmitter Driver Channel Noise Receiver Equalization Receiver Detector M.H. Perrott MIT OCW What are the Issues with Wireless Systems? Noise - Need to extract the radio signal with sufficient SNR - Need to remove interferers (which are often much larger!) - Degrades transmit spectral mask - Degrades selectivity for receiver - Degrades signal – nulls rather than ISI usually the issue - Can actually be used to advantage! We will look at BOTH broadband data links and wireless systems in this class Selectivity (filtering, processing gain) Nonlinearity Multi-path (channel response) M.H. Perrott MIT OCW ...
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This note was uploaded on 10/29/2011 for the course EE 6.976 taught by Professor Michaelperrott during the Spring '03 term at MIT.

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