ARM.SoC.Architecture

1 ruby ii advanced communication controller

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Unformatted text preview: otocols. The 192 Kbit/s raw data rate includes two 64 Kbit/s B channels and one 16 Kbit/s D channel. In telephony applications the B channels carry 8-bit speech samples at an 8 KHz sample rate and the D channel is used for control purposes. The G.711 codec includes an on-chip analogue front end that allows direct connection to both a telephone handset and a hands-free microphone and speaker. The input and output channels have independently programmable gains. The amplification stages have power-down modes to save power when they are inactive. The on-chip analogue to digital converters are based upon timing how long it takes to discharge a capacitor to the input voltage level. This is a very simple way to measure slowly varying voltages, requiring little more than an on-chip comparator, an output to charge the capacitor at the start of the conversion and a means of measuring the time from the start of the conversion to the point where the comparator switches. Typical uses would be to measure the voltage from a volume control potentiometer or to check the battery voltage in a portable application. Memory interface SO-interface Codec ADCs The VLSI ISDN Subscriber Processor 351 Figure 13.2 VIP organization. Keypad interface The keyboard interface uses parallel output ports to strobe the columns of the keypad and parallel input ports with internal pull-down resistors to sense the rows. An OR gate on the inputs can generate an interrupt. If all the column outputs are active, any key press will generate an interrupt whereupon the ARM can activate individual columns and sense individual rows to determine the particular key pressed. The chip has two clock sources. Normal operation is at 38.864 MHz, with 460.8 KHz used during power-down. A watchdog timer resets the CPU if there is no activity for 1.28 seconds, and a 2.5 ms tinier interrupts the processor from sleep mode for DRAM refresh and multitasking purposes. Clocks and timers 352 Embedded ARM Applications Figure 13.3 Typical VIP system configuration....
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