ARM.SoC.Architecture

135 the arm7500 and arm7500fe the arm7500 is a highly

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Unformatted text preview: ystem can generate eight independent channels of 8-bit (logarithmic) analogue stereo sound, played through an on-chip exponential digital-to-analogue converter. Alternatively, 16-bit sound samples can be generated through a serial digital channel and an external CD-quality digital-to-analogue converter. The ARM7500FE only supports the latter 16-bit sound system. The data channels for the video, cursor and sound streams are generated using the DMA controllers in the memory and I/O controller. The memory controller supports the direct connection of up to four banks of DRAM and two banks of ROM. Each bank can be programmed to be 16 or 32 bits wide and the memory controller will make double accesses for 32-bit quantities in 16-bit banks. The DRAM controller uses page mode accesses for sequential cycles in bursts of up to 256 transfers and supports a range of DRAM refresh modes, and the ROM controller also supports burst-mode where suitable devices are used. Three DMA controllers handle data streams for the video, cursor and sound channels. The I/O controller manages a 16-bit off-chip I/O bus (which is expandable to 32 bits using external buffers) and a number of on-chip interfaces. The off-chip bus supports simple peripheral devices, intelligent peripheral modules, PC-style peripherals and an interface for PCMCIA cards. The on-chip interfaces include four analogue comparators which can be used to support four analogue input channels, two serial ports intended for keyboards and/or mice, counter-timers, eight general-purpose open-drain I/O lines and a programmable interrupt controller. Power management facilities are also available. There are many variations on how these chips could be used, but a typical system organization is illustrated in Figure 13.10 on page 362. The ARM7500 has been used in low-cost versions of the Acorn Rise PC and in the Online Media interactive video set-top box. Its principal limitation compared with the The memory and I/O controller System diagram Applications 362 Embedded ARM Applications Figure 13.10 Typical ARM7500 system organization. original Rise PC chip s...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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