16 on page 138 has a spare bit which is used here as

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Unformatted text preview: coding. The ARM floating-point architecture 165 Floating-point data operations The floating-point data operations perform arithmetic functions on values in the floatingpoint registers; their only interaction with the outside world is to confirm that they should complete through the ARM coprocessor handshake. (Indeed, a floating-point coprocessor may begin executing one of these instructions before the handshake begins so long as it waits for confirmation from the ARM before committing a state change.) Figure 6.9 Floating-point data processing binary encoding. The instruction format has a number of opcode bits, augmented by extra bits from each of the three register specifier fields since only three bits are required to specify one of the eight floating-point registers: 'i' selects between a register ('FRm') or one of eight constants for the second operand. 'e' and 'Cop2' control the destination size and the rounding mode. 'j' selects between monadic (single operand) and dyadic (two operand) operations. The instructions include simple arithmetic operations (add, subtract, multiply, divide, remainder, power), transcendental functions (log, exponential, sin, cos, tan, arcsin, arccos, arctan) and assorted others (square root, move, absolute value, round). Floating-point register transfers The register transfer instructions accept a value from or return a value to an ARM register. This is generally combined with a floating-point processing function. Figure 6.10 Floating-point register transfer binary encoding. Transfers from ARM to the floating-point unit include 'float' (convert an integer in an ARM register to a real in a floating-point register) and writes to the floating-point status and control registers; going the other way there is 'fix' (convert a real in a floating-point register to an integer in an ARM register) and reads of the status and control registers. The floating-point compare instructions are special cases of this instruction type, where Rd is r15. Two floating-registers are compared and the result of the comparison...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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