ARM.SoC.Architecture

18 on page 236 the read or write takes place when the

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Unformatted text preview: nning on the target system can communicate with the host. The software in the target system sees the comms port as a 6-bit control register and 32-bit data read and write registers which are accessed using MRC and MCR instructions to coprocessor 14. The host sees these registers in the EmbeddedlCE register map as shown in Table 8.1 on page 235. An ARM-based system chip which includes the EmbeddedlCE module connects to a host computer through the JTAG port and a protocol converter. This configuration supports the normal breakpoint, watchpoint and processor and system state access that the programmer is accustomed to using for native or ICE-based debugging (in addition to the comms port described above), and with suitable host software gives a full source-level debugging capability with low hardware overhead. The only facility that is missing is the ability to trace code in real time. This is the function of the Embedded Trace Macrocell described in the next section. Debugging Embedded Trace 237 8.8 Embedded Trace When debugging real-time systems it is often difficult to debug the application software without the capability of observing its operation in real time. The breakpoint and watchpoint facilities offered by the EmbeddedlCE macrocell are insufficient for this purpose as using them causes the processor to deviate from its normal execution sequence, destroying the temporal behaviour of the software. What is required is an ability to observe the processor operating at full speed by generating a trace of its address, data and control bus activity as the program executes. The problem is that this represents a huge data bandwidth - an ARM processor running at 100 MHz generates over 1 Gbyte/s of interface information. Getting this information off the chip would require so many pins that it would be uneconomic to include the capability on production devices, so special development devices would be needed, adversely affecting the costs of developing a new system-on-chip application. Trace compression The solution adopted by ARM Limited is to reduce the interface bandwidth using intelligent trace compression techniques. For example: Most ARM addresses are sequential, so it is not necessary to send every address off chip. Instead, the sequential information can be s...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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