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Unformatted text preview: or's visible state. 3. Transfers from the ARM to the coprocessor are generally simpler since any data conversion work can take place in the coprocessor after the transfer has completed. 5.20 Breakpoint instruction (BKPT - architecture v5T only)
Breakpoint instructions are used for software debugging purposes; they cause the processor to break from normal instruction execution and enter appropriate debugging procedures. Binary encoding Figure 5.18 Breakpoint instruction binary encoding. Description Assembler format Example Notes This instruction causes the processor to take a prefetch abort when the debug hardware unit is configured appropriately.
BKPT BKPT ; ! 1. Only processors that implement ARM architecture v5T support the BRK instruc tion (see Section 5.23 on page 147). 2. BRK instructions are unconditional - the condition field must contain the 'ALWAYS' code. 142 The ARM Instruction Set 5.21 Unused instruction space
Not all of the 232 instruction bit encodings have been assigned meanings; the encodings that have not been used so far are available for future instruction set extensions. The unused instruction encodings each fall into particular gaps left in the used encodings, and their likely future use can be inferred from where they lie. Unused arithmetic instructions These instructions look very like the multiply instructions described in Section 5.8 on page 122. This would be a likely encoding, for example, for an integer divide instruction.
31 Figure 5.19 Arithmetic instruction extension space. Unused control instructions These instructions include the branch and exchange instructions described in Section 5.5 on page 115 and the status register transfer instructions described in Sections 5.14 and 5.15 on pages 133 and 134. The gaps here could be used to encode other instructions that affect the processor operating mode. 31 Figure 5.20 Control instruction extension space. Unused load/ store instructions There are unused encodings in the areas occupied by the swap instructions described in Section 5.13 on page 132 and the load and store half-...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.
- Spring '09