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Unformatted text preview: incorporates a number of other minor changes. Both of these devices are well suited to consumer multimedia applications such as set-top boxes, Internet appliances and games consoles, but have many other potential application areas. The principal macrocells on the ARM7500 and ARM7500FE chips are: the ARM CPU core; the FPA10 floating-point coprocessor (on the ARM7500FE only); the video and sound macrocell; the memory and I/O controller. The ARM CPU CPU, the Core The ARM CPU core contains most of the functionality of the ARM710 only compromise to allow room for the other macrocells being a reduction in the size of the cache from 8 Kbytes to 4 Kbytes. The CPU is based around the ARM7 integer core (a forerunner of the ARM7TDMI, without Thumb and embedded debug support), with a 4 Kbyte 4-way set-associative mixed instruction and data cache, a memory management unit based on a 2-level page table with a 64-entry translation look-aside buffer and a write buffer. The FPA10 was described in some detail in Section 6.4 on page 163. It provides a significant enhancement of the ability of the system to handle floating-point data types (which, without the coprocessor, would be handled using the ARM floating-point library The FPA10 floating-point unit The ARM7500 and ARM7500FE 361 routines). The floating point performance is up to 6 MFLOPS (measured using the Lin-pack benchmark running double-precision floating point code) at 40 MHz. The video and sound macrocell The video controller can generate displays using a pixel clock of up to 120 MHz (which is generated by a simple off-chip voltage controlled oscillator using an on-chip phase comparator). It includes a 256-entry colour palette with on-chip 8-bit digital-to-analogue converters for each of the red, green and blue outputs and additional control bits for external mixing and fading. A separate hardware cursor is supported, and the output can drive a high-resolution colour monitor or a single- or double-panel grey-scale or colour liquid crystal display. The display timing is fully programmable. The ARM7500 sound s...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.
- Spring '09