A plot of the draco silicon layout is shown in figure

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Unformatted text preview: d VLSI Technology, Inc. Tools from Compass Design Automation (now part of Avant!) were important to the success of both projects, and TimeMill from EPIC Design Technology, Inc. (now part of Synopsys) was vital to the accurate modelling of AMULET2 and AMULETS. 14.8 Example and exercises Summarize the advantages and disadvantages of self-timed design. The advantages discussed here are: improved electromagnetic compatibility (EMC); improved power-efficiency; improved design modularity; the removal of the clock-skew problem; the potential for typical rather than worst-case performance. The disadvantages are: the unavailability of design tools for self-timed design; the lack of designer experience; an aversion to self-timed techniques has been encouraged in design education; there is a lack of commercial-scale demonstrations of the above-claimed advantages. In general it is still a high-risk option to pursue a self-timed solution to a design problem, and the lack of tools can make it very labour intensive. Example 14.1 398 The AMULET Asynchronous ARM Processors Exercise 14.1.1 Estimate the effect on the performance of both clocked and self-timed processors of memory conflicts when the processor core has separate instruction and data ports both of which are connected to a single dual-port memory. Assume the memory is constructed from eight arbitrated segments similar to the AMULET3H memory but without the line buffers (see "AMULET3H memory organization" on page 393). You can assume that the processor fetches instructions continuously and requires about one data memory access for every two instructions. The instruction and data accesses from the clocked processor will be synchronized (by the clock!), so every time contention arises one of the two accesses will be stalled for one cycle. The asynchronous processor has no such sychronization so the two accesses have random relative timing and the stall will be for whatever proportion of the first contending access time remains when the second contending access is requested. Estimate the effect on performance of the instructio...
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