ARM.SoC.Architecture

A typical cmos circuit is the static nand gate

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: en 1 and 2 volts, and this will reduce further in the future. The gate operates by connecting the output either to Vdd through a pull-up network of p-type transistors, or to Vss through a pull-down network of n-type transistors. When the inputs are both close to one rail or the other, then one of these networks is conducting and the other is effectively not conducting, so there is no path through the gate from Vdd to Vss. Furthermore, the output is normally connected to the inputs of similar gates Design for low power consumption 29 and therefore sees only capacitive load. Once the output has been driven close to either rail, it takes no current to hold it there. Therefore a short time after the gate has switched the circuit reaches a stable condition and no further current is taken from the supply. This characteristic of consuming power only when switching is not shared by many other logic technologies and has been a major factor in making CMOS the technology of choice for high-density integrated circuits. CMOS power components The total power consumption of a CMOS circuit comprises three components: Switching power. This is the power dissipated by charging and discharging the gate output capacitance CL, and represents the useful work performed by the gate. The energy per output transition is: Short-circuit power. When the gate inputs are at an intermediate level both the p- and n-type networks can conduct. This results in a transitory conducting path from Vdd to Vss. With a correctly designed circuit (which generally means one that avoids slow signal transitions) the short-circuit power should be a small fraction of the switching power. Leakage current. The transistor networks do conduct a very small current when they are in their 'off' state; though on a conventional process this current is very small (a small fraction of a nanoamp per gate), it is the only dissipation in a circuit that is powered but inactive, and can drain a supply battery over a long period of time. It is generally neg...
View Full Document

This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

Ask a homework question - tutors are online