Unformatted text preview: n and data line buffers in the AMULET3H memory system. Make the same assumptions as in the previous exercise. Exercise 14.1.2 Appendix: Computer Logic
Computer logic
Computer design is based upon Boolean logic where a signal on a wire has one of two values: true or false. Typically a voltage near ground represents 'false' and one near the supply voltage represents 'true'; however, any representation that can reliably reflect two different states can be used. 'True' is sometimes called logic ' 1' and 'false' logic '0'. A logic gate produces a function of one or more logic inputs. A 2input 'AND' gate, for example, produces a 'true' output if the first input is 'true' AND the second input is 'true'. Since each input is either 'true' or 'false', there are only four possible input combinations, and the complete functionality of the gate can be expressed in a truth table as shown in Figure A. 1, which also shows the logic symbol for an AND gate. An AND gate can be extended to more than two inputs (though current Logic gates Figure A.1 The logic symbol and truth table for an AND gate. CMOS technology limits the practical fanin to four inputs, reducing to three inputs on some submicron process technologies). The output is a ' 1' when all the inputs are T, and the output is '0' when at least one input is '0'. An OR gate is defined similarly, giving a '0' when all the inputs are '0' and a T when at least one input is a ' 1'. The logic symbol and truth table for a 2input OR gate are shown in Figure A.2 on page 400. A vital logic component is the inverter. This has one input and produces the opposite output. Its logic function is NOT. The output is false ('0') if the input is true ('!') and vice versa. An AND gate with an inverter on the output is a NAND (NOT AND) gate, and an OR gate with an inverter on the output is a NOR (NOT OR) gate. Inversion is often denoted by a circular 'bubble' on the input or output of a gate.
399 400 Appendix: Computer Logic Figure A.2 The logic symbol and truth table for an OR gate. In fact conventional simple CMOS gates are inheren...
View
Full
Document
This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.
 Spring '09
 Staff

Click to edit the document details