ARM.SoC.Architecture

Assume the memory is constructed from eight

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Unformatted text preview: tly inverting, so NAND is simpler than AND, the latter being formed by adding an inverter to the former, and similarly OR gates are formed from NOR gates by adding inverters. Boolean algebra All logic circuits can be constructed using only 2-input NAND gates. This stems from the rules of Boolean algebra. First, observe that if both inputs of a NAND gate are connected to the same signal, the output is the inverse of the input, so we have an inverter. Next, connect an inverter to each input of a NAND gate. A brief examination of the truth table reveals that the resulting circuit performs the OR function. Often logic equations are written using the notation of conventional arithmetic, using '' for AND and '+' for OR. Thus 'A AND (B OR Q' is written 'A-(B + Q'. Logical inversion is denoted by an overbar: 'A NAND 5' is written 'A-B\ This notation is very convenient provided that the context makes it clear that an equation is a Boolean logic equation where 1 + 1 = 1. Numbers are usually represented in computers in binary notation (there is a more complete discussion of data types and number representation in Section 6.2 on page 153). Here, instead of using the familiar base 10 number notation where each digit is in the range 0 to 9 and positions have values which scale by powers of 10 (units, tens, hundreds,...), binary numbers have digits which are either 0 or 1 and positions have values that scale by powers of 2 (units, twos, fours, eights, six-teens,...). Since each binary digit (bit) is restricted to one of two values it can be represented by a Boolean value, and the complete binary number is represented by an ordered set of Boolean values. The sum of two single-bit binary numbers can be formed using the logic gates we have met already. If both bits are zero the sum is zero; the sum of a one and a zero is one, but the sum of two ones is two, which is represented in binary notation by the two bits ' 10'. An adder for two single-bit inputs must therefore have two output bits: a sum bit wi...
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