ARM.SoC.Architecture

Binary encoding figure 57 multiply instruction binary

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Unformatted text preview: set in the instruction: The N flag is set to the value of bit 31 of Rd for the variants which produce a 32bit result, and bit 31 of RdHi for the long forms. The Z flag is set if Rd or RdHi and RdLo are zero. The C flag is set to a meaningless value. The V flag is unchanged. Assembler formats Instructions that produce the least significant 32 bits of the product: MUL{<cond>}{S} Rd, Rm, Rs MLA{<cond>}{S} Rd, Rm, Rs, Rn The following instructions produce the full 64-bit result: <mul>{<cond>}{S}RdHi, RdLo, Rm, Rs where <mul> is one of the 64-bit multiply types (UMULL, UMLAL, SMULL, SMLAL). 124 The ARM Instruction Set Examples To form a scalar product of two vectors: MOV LOOP MOV LDR LDR MLA rll, #20 rlO, #0 r0, [r8], #4 r1, [r9], #4 rlO, r0, r1, rlO rll, rll, #1 LOOP initialize loop counter initialize total get first component.. . .and second accumulate product decrement loop counter SUBS BNE Notes 1. Specifying r15 for any of the operand or result registers should be avoided as it produces unpredictable results. 2. Rd, RdHi and RdLo should be distinct from Rm, and RdHi and RdLo should not be the same register. 3. Early ARM processors only supported the 32-bit multiply instructions (MUL and MLA). The 64-bit multiplies are available only on ARM? versions with an 'M' in their name (ARM7DM, ARM7TM, and so on) and subsequent processors. 5.9 Count leading zeros (CLZ - architecture v5T only) This instruction is only available on ARM processors that support architecture v5T. It is useful for renormalizing numbers, and performs its functions far more efficiently than can be achieved using other ARM instructions. Binary encoding Figure 5.8 Count leading zeros instruction binary encoding. Single word and unsigned byte data transfer instructions 125 Description The instruction sets Rd to the number of the bit position of the most significant 1 in Rm. If Rm is zero Rd will be set to 32. Assembler format Example Notes 1. Only processors that implement ARM architect...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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