ARM.SoC.Architecture

ARM.SoC.Architecture

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Unformatted text preview: r PLA has around 14 inputs, 40 product terms and 40 outputs, the precise number varying slightly between the different cores. On recent ARM cores it Figure 4.21 ARM control logic structure. 100 ARM Organization and Implementation is implemented as two PLAs: a small, fast PLA which generates the time critical outputs and a larger, slower PLA which generates all the other outputs. Functionally, however, it can be viewed as a single PLA unit. The 'cycle count' block distinguishes the different cycles of multi-cycle instructions so that the decode PLA can generate different control outputs for each cycle. It is, in fact, not simply a counter but a more general finite state machine capable of skipping unneeded cycles and of locking into a fixed state. It determines when the current instruction is about to complete and initiates the transfer of the next instruction from the instruction pipeline, including aborting instructions at the end of their first cycle if they fail their condition test. However, much of the time its behaviour is like that of a simple counter so it is not too misleading to think of it as an instruction cycle counter. Physical design So far we have been concerned principally with the logic design of an ARM core and said little about its physical implementation on a particular CMOS process. There are two principal mechanisms used to implement an ARM processor core (or any other core, for than matter) on a particular process: a hard macrocell is delivered as physical layout ready to be incorporated into the final design; a soft macrocell is delivered as a synthesizable design expressed in a hardware description language such as VHDL. A hard macrocell can be fully characterized on the target process and can exploit the area advantages of full-custom hand-tuned layout, but it can be used only on the particular process for which it has been designed. The layout must be modified and recharacterized for every new process. A soft macrocell can readily be ported to a new process technology, but after each process change...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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