For example the arm macrocell has a 13 bit control

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Unformatted text preview: Bus 220 Architectural Support for System Development peripheral timing strobe (PENABLE). APB transfers are timed to PCLK, and all APB devices are reset with PRESETn. The address and control signals are all set up and held with respect to the timing strobe to allow time for local decoding with the select acting as the local enable. Peripherals which are slave devices based around simple register mapping may be interfaced directly with minimal logic overhead. Advanced Highfor performance BUS The AHB is intended to replace the ASB in very high performance systems, example those based on the ARM1020E (described in Section 12.6 on page 341). The following features differentiate the AHB from the ASB: It supports split transactions, where a slave with a long response latency can free up the bus for other transfers while it prepares its data for transmission. It uses a single clock edge to control all of its operations, aiding synthesis and design verification (through the use of static timing analysis and similar tools). It uses a centrally multiplexed bus scheme rather than a bidirectional bus with tristate drivers (see Figure 8.12 on page 221). It supports wider data bus configurations of 64 or 128 bits. The multiplexed bus scheme may appear to introduce a lot of excess wiring, but bidirectional buses create a number of problems for designers and even more for synthesis systems. For example, as chip feature sizes shrink wire delays begin to dominate performance issues, and unidirectional buses can benefit from the insertion of repeater drivers that are very hard to add to a bidirectional bus. 8.3 The ARM reference peripheral specification The support for system development described so far in this chapter is principally aimed at testing and providing low-level access to processor and system state. AMBA offers a systematic way to connect hardware components together on a chip, but software development must still start from first principles on each new chip. If a system developer wishes to start from a higher baseline, for example to base the software on a particular real-time operating system, then a number of components must be available to support the basic operating sy...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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