ARM.SoC.Architecture

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Unformatted text preview: le (since I/O areas should not be cached), but this can be far simpler than a full memory management system. The general principles of memory management were described in the previous chapter. Subsequent sections in this chapter introduce the ARM system control coprocessor and the memory management systems it controls, which include a full MMU with address translation and a simpler 'protection unit' for embedded systems that do not require address translation. Following this there are sections on the important operating system related issues of synchronization, context switching and the handling of input/output devices, including the use of interrupts. Chapter structure 11.2 The ARM system control coprocessor The ARM system control coprocessor is an on-chip coprocessor, using logical coprocessor number 15, which controls the operation of the on-chip cache or caches, memory management or protection unit, write buffer, prefetch buffer, branch target cache and system configuration signals. 294 Architectural Support for Operating Systems CP15 instructions The control is effected through the reading and writing of the CP15 registers. The registers are all 32 bits long, and access is restricted to MRC and MCR instructions (see Section 5.19 on page 139) which must be executed in supervisor mode. Use of other coprocessor instructions or any attempted access in user mode will cause the undefined instruction trap to be taken. The format of these instructions is shown in Figure 11.1. In most cases the CRm and Cop2 fields are unused and should be zero, though they are used in certain operations. Figure 11.1 CP15 register transfer instructions. Protection unit ARM CPUs which are used in embedded systems with fixed or controlled application programs do not require a full memory management unit with address translation capabilities. For such systems a simpler protection unit is adequate. The CP15 register organization for the ARM protection units is described in Section 11.3, and the operation of the protection unit is described in...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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