ARM.SoC.Architecture

The arm mmu is a sophisticated unit that occupies a

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Unformatted text preview: rs of the cache (leaving a direct-mapped cache). This is a coarse granularity and is inefficient if, for example, all that need be locked down is memory to hold a small interrupt handler. The CAM-RAM caches typically offer 64-way associativity, enabling the cache to be locked-down in units of 1/64 of the total cache, which is a much finer granularity. Discuss the impact of the following cache features on performance and power dissipation: 1. Increasing associativity by splitting the tag and data RAMs into multiple blocks which perform parallel look-ups. Example 12.1 Exercise 12.1.1 2. Serializing the tag and data RAM accesses. 3. Exploiting sequential access patterns to bypass the tag look-up and to optimize the data RAM access mechanism. 4. Including separate data and instruction caches (as on StrongARM). Exercise 12.1.2 Explain why an on-chip write buffer cannot be used with an off-chip memory management unit. Why, as processor speeds rise relative to memory speeds, does it become increasingly important to use a copy-back rather than a write-through cache write strategy? Exercise 12.1.3 Embedded ARM Applications Summary of chapter contents Increasingly the trend in embedded system design is to integrate all the major system functions apart from some memory components into a single chip. The benefits in terms of component costs, reliability and power-efficiency are considerable. The development that makes this possible is the advance in semiconductor process technology which now allows chips incorporating millions of transistors to be built cheaply, and within a few years will allow tens of millions of transistors on a chip. So, the era of complex systems on a single chip is upon us. The ARM has played a leading role in the opening of this era since its very small core size leaves more silicon resources available for the rest of the system functions. In this chapter we look at several examples of ARM-based 'systems on chips', but we are, in fact, only scratching the sur...
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