ARM.SoC.Architecture

The bulk of the code will not be speed critical and

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Unformatted text preview: e architecture with data processing, data transfer and control flow instructions. Support for 8-bit byte, 16-bit half-word and 32-bit word data types where half-words are aligned on 2-byte boundaries and words are aligned on 4-byte boundaries. A 32-bit unsegmented memory. Thumb-ARM differences However, in order to achieve a 16-bit instruction length a number of characteristic features of the ARM instruction set have been abandoned: Most Thumb instructions are executed unconditionally. (All ARM instructions are executed conditionally.) Many Thumb data processing instructions use a 2-address format (the destination register is the same as one of the source registers). (ARM data processing instructions, with the exception of the 64-bit multiplies, use a 3-address format.) Thumb instruction formats are less regular than ARM instruction formats, as a result of the dense encoding. Thumb exceptions All exceptions return the processor to ARM execution and are handled within the ARM programmer's model. Since the T bit resides in the CPSR, it is saved on exception entry in the appropriate SPSR, and the same return from exception instruction will restore the state of the processor and leave it executing ARM or Thumb instructions according to the state when the exception arose. Note that the ARM exception return instructions, described in 'Exception return' on page 109, involve return address adjustments to compensate for the ARM pipeline behaviour. Since Thumb instructions are two bytes rather than four bytes long, the natural offset should be different when an exception is entered from Thumb execution, since the PC value copied into the exception-mode link register will have incremented by a multiple of two rather than four bytes. However, the Thumb architecture requires that the link register value be automatically adjusted to match the ARM return offset, allowing the same return instruction to work in both cases, rather than have the return sequence made more complex. 7.3 Thumb branch instructions These control flow instructions include the various forms of PC-relative b...
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