ARM.SoC.Architecture

The only facility that is missing is the ability to

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Unformatted text preview: ent on most cycles and the full address only when a branch is taken. If there is off-chip logic which has access to the code which is running on the processor, it will know when the processor is executing a branch instruction and where the target of the branch is. The only information which must be sent off chip is whether or not the branch is taken. Fuller address information is now required only when the branch target is not known, such as in a subroutine return or jump table instruction. Even here, only those low-order address bits that change need be issued. The address information is now very bursty. A first-in-first-out (FIFO) buffer can be used to smooth the data rate so that the necessary address information can be transmitted in 4-, 8- or 16-bit packets at a steadier rate. Using a number of techniques similar along these lines, the ARM Embedded Trace Macrocell can compress the trace information to the extent necessary to allow it to be communicated off chip through 9, 13 or 21 pins depending on the configuration. These pins could be used for other purposes when trace output is not required. Real-time debug A complete real-time debug solution is as shown in Figure 8.19 on page 238. The EmbeddedlCE unit supports breakpoint and watchpoint functionality, and communication channels between the host and target software. The Embedded Trace Macrocell compresses the processor's interface information and sends it off chip through the Trace port. The JTAG port is used to control both units. The external EmbeddedlCE 238 Architectural Support for System Development EmbeddedlCE| controller Embedded trace macrocell Figure 8.19 Real-time debug system organization. controller is used to connect the host system to the JTAG port, and the external Trace Port Analyser interfaces the host system to the Trace port. The host may connect to both the trace port analyser and the EmbeddedlCE controller via a network. The user has control of the breakpoint and watchpoint settings and various trace functions. All the application software may be...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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