ARM.SoC.Architecture

These equations abstract the essential behaviour of

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Unformatted text preview: cs. The equations that describe the behaviour of a transistor are still fairly complex. When a group of transistors is wired together in a particular structure, such as the CMOS (Complementary Metal Oxide Semiconductor) NAND gate shown in Figure 1.2, the behaviour of the group has a particularly simple description. If each of the input wires (A and B) is held at a voltage which is either near to Vdd or near to Vss, the output will will also be near to Vdd or Vss according to the following rules: If A and B are both near to Vdd, the output will be near to Vss. If either A or B (or both) is near to Vss, the output will be near to Vdd. Logic gates Figure 1.2 The transistor circuit of a static 2-input CMOS NAND gate. Abstraction in hardware design 5 With a bit of care we can define what is meant by 'near to' in these rules, and then associate the meaning true with a value near to Vdd and false with a value near to Vss. The circuit is then an implementation of the NAND Boolean logic function: output = --(A^B) Equation 1 Although there is a lot of engineering design involved in turning four transistors into a reliable implementation of this equation, it can be done with sufficient reliability that the logic designer can think almost exclusively in terms of logic gates. The concepts that the logic designer works with are illustrated in Figure 1.3, and consist of the following 'views' of the logic gate: Logic symbol A logic symbol. This is a symbol that represents a NAND gate function in a circuit schematic; there are similar symbols for other logic gates (for instance, removing the bubble from the output leaves an AND gate which generates the opposite output function; further examples are given in 'Appendix: Computer Logic' on page 399). Truth table A truth table. This describes the logic function of the gate, and encompasses everything that the logic designer needs to know about the gate for most purposes. The significance here is that it is a lot simpler than four sets of transistor equations. (In this truth...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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