ARM.SoC.Architecture

These instructions perform the first step in this

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Unformatted text preview: essary to save or modify the contents of the CPSR or the SPSR of the current mode, those contents must first be transferred into a general register, the selected bits modified and then the value returned to the status register. These instructions perform the last step in this sequence. Binary encoding Figure 5.14 Transfer to status register instruction binary encoding. General register to status register transfer instructions 135 Description The operand, which may be a register (Rm) or a rotated 8-bit immediate (specified in the same way as the immediate form of operand2 in the data processing instructions), is moved under a field mask to the CPSR (R = 0) or current mode SPSR (R = I). The field mask controls the update of the four byte fields within the PSR register. Instruction bit 16 determines whether PSR[7:0] is updated, bit 17 controls PSR[15:8], bit 18 controls PSR[23:16] and bit 19 controls PSR[31:24]. When an immediate operand is used only the flags (PSR[31:24]) may be selected for update. (These are the only bits that may be updated by user-mode code.) MSR{<cond>} CPSR_fISPSR_f, #<32-bit immediate> MSR{<cond>} CPSR_<field>ISPSR_<field>, Rm Assembler format where <f ield> is one of: c - the control field - PSR[7:0]. x - the extension field - PSR[15:8] (unused on current ARMs). s - the status field - PSR[23:16] (unused on current ARMs). f- the flags field -PSR[31:24]. Examples To set the N, Z, C and V flags: MSR CPSR_f, #&f0000000; set all the flags To set just the C flag, preserving N, Z and V: MRS r0, CPSR ORR r0, #&20000000 MSR r0, move the CPSR to r0 set bit 29 of r0 move back to CPSR CPSR_f, r0 To switch from supervisor mode into IRQ mode (for instance, to initialize the IRQ stack pointer at start up): MRS BIC ORR r0, CPSR r0, r0, #&lf r0, r0, #&12 ; move the CPSR to r0 ; clear the bottom 5 bits ; set the bits to IRQ mode MSR CPSR c, r0 ; move back to CPSR In this case it is necessary to copy the original CPSR value in order not to change the interrupt...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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