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Unformatted text preview: costs three cycles to load and the branch costs three cycles per loop. 150 The ARM Instruction Set The load costs may be reduced by using multiple register loads and the branch cost by 'loop unrolling'. Combining these two techniques gives a program such as: Now the loop overhead is 16 cycles plus the multiply time for four pairs of data values, or four cycles for each pair.
Exercise 5.1.1 Write a subprogram which copies a string of bytes from one memory location to another. The start of the source string will be passed in r1, the length (in bytes) in r2 and the start of the destination string in r3. Repeat the previous exercise using the technique demonstrated in the above example to improve the performance. Assume that both source and destination strings are word-aligned and the string is a multiple of 16 bytes long. Now assume that the source string is word-aligned but the destination string may have any byte alignment. The string is still a multiple of 16 bytes long. Write a program which handles 16 byte blocks at a time, using multiple register transfers for the bulk of the storing but byte stores for the end conditions. Exercise 5.1.2 Exercise 5.1.3 Architectural Support for High-level Languages Summary of chapter contents
High-level languages allow a program to be expressed in terms of abstractions such as data types, structures, procedures, functions, and so on. Since the RISC approach represents a movement away from instruction sets that attempt to support these high-level concepts directly, we need to be satisfied that the more primitive RISC instruction set still offers building blocks that can be assembled to give the necessary support. In this chapter we will look at the requirements that a high-level language imposes on an architecture and see how those requirements may be met. We will use C as the example high-level language (though some might debate its qualification for this role!) and the ARM instruction set as the architecture that the language is com...
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- Spring '09