ARM.SoC.Architecture

# When clear the condition codes will be unchanged when

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Unformatted text preview: struction Set Notes 1. Since the immediate field must be encoded within a subset of a 32-bit instruction, not all 32-bit immediate values can be represented. The binary encoding shown in Figure 5.6 on page 119 shows how the immediate values are encoded. The immediate value is generated by rotating an 8-bit immediate field through an even number of bit positions. 5.8 Multiply instructions ARM multiply instructions produce the product of two 32-bit binary numbers held in registers. The result of multiplying two 32-bit binary numbers is a 64-bit product. Some forms of the instruction, available only on certain versions of the processor, store the full result into two independently specified registers; other forms store only the least significant 32 bits into a single register. In all cases there is a multiply-accumulate variant that adds the product to a running total and both signed and unsigned operands may be used. The least significant 32 bits of the result are the same for signed and unsigned operands, so there is no need for separate signed and unsigned versions of the 32-bit result instructions. Binary encoding Figure 5.7 Multiply instruction binary encoding. Multiply instructions 123 Table 5.5 Multiply instructions. Opcode [23:21] 000 001 100 101 110 Mnemonic MUL MLA UMULL UMLAL SMULL SMLAL Meaning Multiply (32-bit result) Multiply-accumulate (32-bit result) Unsigned multiply long Unsigned multiply-accumulate long Signed multiply long Signed multiply-accumulate long Effect Rd:=(Rm*Rs)[31:0] Rd:=(Rm*Rs + Rn)[31:0] RdHirRdLo := Rm * Rs RdHi: RdLo += Rm * Rs RdHi:RdLo := Rm * Rs RdHi:RdLo+=Rm*Rs 111 Description The functions of the various forms of multiply are listed in Table 5.5. The notation used in the table is as follows: 'RdHi:RdLo' is the 64-bit number formed by concatenating RdHi (the most sig nificant 32 bits) and RdLo (the least significant 32 bits).'[31:0]' selects only the least significant 32 bits of the result. Simple assignment is denoted by ':='. Accumulation (adding the right-hand side to the left) is denoted by'+='. The S bit controls the setting of the condition codes as with the other data processing instructions. When it is...
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## This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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