Where the system performance is limited by the

Info iconThis preview shows page 1. Sign up to view the full content.

View Full Document Right Arrow Icon
This is the end of the preview. Sign up to access the rest of the document.

Unformatted text preview: on continues loading the line fetch buffer while the processor accesses the cache. There is an additional CAM entry that identifies references to the data which is stored in the line fetch buffer. Indeed, this data remains in the line fetch buffer where it can be accessed on equal terms to data in the cache until the next cache miss, whereupon the whole buffer is copied into the cache while the new data is loaded from external memory into the line fetch buffer. AMULET2e silicon A plot of the AMULET2e die is shown in Figure 14.8 and the characteristics of the device are summarized in Table 14.3 on page 386. The AMULET2 core uses 93,000 transistors, the cache 328,000 and the remainder are in the control logic and pads. Figure 14.8 AMULET2e die plot. Timing reference The absence of a reference clock in an asynchronous system makes timing memory accesses an issue that requires careful consideration. The solution incorporated into AMULET2e uses a single external reference delay connected directly to the chip and configuration registers, loaded at start-up, which specify the organization and timing properties of each memory region. The reference delay could, for example, reflect the external SRAM access time, so the RAM will be configured to take one 386 The AMULET Asynchronous ARM Processors Table 14.3 Process Metal layers Vdd AMULET2e characteristics. 454,000 MIPS 41 mm2 Power none MIPS/W 40 140 mW 285 0.5 urn Transistors 3 Die area 3.3V Clock reference delay. The slower ROM may be configured to take several reference delays. (Note that the reference delay is only used for off-chip timing; all on-chip delays are self-timed.) AMULET26 systems incorporating AMULET2e has been configured to make building small systems as straightforward as possible. As an example, Figure 14.9 shows a test card AMULET2e. The only components, apart from AMULET2e itself, are four SRAM chips, one ROM chip, a UART and an RS232 line interface. The UART uses a crystal oscillator to control its bit rate, but all the system timing functions are controlled byAMULET2e. The ROM contains the standard ARM 'Angel' code and...
View Full Document

Ask a homework question - tutors are online