ARM.SoC.Architecture

Bandwidth 344 double bandwidth 257 bottlenecks 79

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Unformatted text preview: erating system support 290--315 ARM MMU architecture 302-8 ARM system control coprocessor 293-4 context switching 310--11 CP15 registers 294-7,298-302 device drivers 315 embedded systems 293 input/output 312-15 memory management 291 multi-user systems 291 protection 291-2,294-8 resource allocation 292,315 single-user systems 292-3 synchronization 308-9 orthogonal instructions 16 packed decimal numbers 161-2 packed structures 157,184 padding 183 page absent 143 page protected 143 page translation 304-5 paging 285-6 parameters 176 pause controller 222 PCB testing 229 peripherals 216,370 memory-mapped 312 reference peripheral specification 220-2 physical caches 287-8 physical design 100-1 Piccolo coprocessor 240 piconets 356 pipelining 21-4,26 ARM10TDMI 264 ARM7TDMI 260-1 ARMS 257 ARM9TDMI 260-1 stage organization 78-82 FPA10 pipeline 167 self-timed 377 StrongARMSA-110 329-31 3 stage organization 75--8 PLA (programmable logic array) 99 pointer arithmetic 169 pointer initialization 56-7 pointers 157 post-indexed addressing 59 power management 28-32, 320, 375 ARM7100 365-6 ARM7TDMI 254 ARM9TDMI 262 Bluetooth 357-8 optimization 320-1 VWS22100 GSM chip 355 pre-indexed addressing mode 58 prefetch aborts 144 prefetch units 387-8 418 Index printable characters 156 printed circuit board (PCB) testing 229 priority information 291 privileged operating modes 106--7 Procedure Call Standard (APCS) 176-9 procedures 175--80 process synchronization 309 processor cores 74, 247 AMULET cores 374-97 ARM7TDMI 255 ARM9TDMI 262 CPU cores 317^*5 debugging 233 DSP cores 239^tO StrongARMSA-110 328-9 synthesizable 255,263,341 processors abstraction in hardware design 3-7 components 7--8 definition 2 design trade-offs 19-24 instruction set design 14-19 MU0 processors 7--13 stored-program computers 2, 3 usage measurements 21 program counter (PC) register 7 program design 71 program hierarchy 175 programmer's model 39-43, 190-1 Project Manager 46 protection 291-2, 294-8 prototyping tools 223-4 pseudo-code 71 Psion Series 5 366-7 public instructions 227-9 Qflag 241-2 r15 119-20 R-S (Reset-Set) flip-flop 402 Rapid Silicon Prototyping 223-4 re-entrant code 178-9 read-after-write pipeline hazard 22 read-sensitive memory locations 312 real numbers 156 real-time debug 237-8 reference peripheral specification 220-2 register bank 75,96-8 register-indirect addressing 17, 56 registers 402,403-4 base registers 17,56 coherency 379 CP15 294-7,298-302 EmbeddedlCE mapping 235 forwarding 381--2 load and...
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This document was uploaded on 10/30/2011 for the course CSE 378 380 at SUNY Buffalo.

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