lec01-introduction_to_massively_parallel_computing

lec01-introduction_to_massively_parallel_computing - GPU...

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GPU Programming ecture 1: Introduction to Massively Lecture 1: Introduction to Massively Parallel Computing
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Course Goals Learn how to program massively parallel processors pg y p p and achieve High performance unctionality and maintainability Functionality and maintainability Scalability across future generations Acquire technical knowledge required to achieve above goals Principles and patterns of parallel programming rocessor architecture features and constraints Processor architecture features and constraints Programming API, tools and techniques © 2008 NVIDIA Corporation
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Course Description This course will examine the architecture and capabilities of modern GPUs (graphics processing unit). The GPU has grown in power over recent years, to the point where many computations can be performed faster on the GPU yp p than on a traditional CPU. GPUs have also become programmable, allowing them to be used for a diverse set f applications far removed from traditional graphics of applications far removed from traditional graphics settings. Topics covered will include architectural aspects of modern GPUs, with a special focus on their streaming parallel nature, writing programs on the GPU using high © 2008 NVIDIA Corporation level language CUDA, and using the GPU for graphics and general purpose applications in the area of geometry modeling, physical simulation, scientific computing and
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Web Resources Website: http://www.ece.mtu.edu/~saeid/gpu/ Lecture slides ocumentation Notes Documentation, Notes Useful Website for Cuda Tutorial http://code.google.com/p/stanford-cs193g- sp2010/wiki/GettingStartedWithCUDA © 2008 NVIDIA Corporation
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Grading Mid Sem Exam: 20% Final Exam : 50% Project: 35% echnical Content 25% Technical Content 25% Presentation 25% Correctness and Completeness 50% © 2008 NVIDIA Corporation
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Course Equipment PCs running CUDA emulators g Better debugging environment Your own PCs with a CUDA-enabled GPU uch faster but less debugging support Much faster but less debugging support PCs with a CUDA enabled GPU, NVIDIA boards in CCSR © 2008 NVIDIA Corporation
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Text & Notes Course text: Kirk & Hwu. Programming Massively Parallel Processors: A Hands-on Approach . 2010. eferences: References: NVIDIA. The NVIDIA CUDA Programming Guide . 2010. NVIDIA. CUDA Reference Manual. 2010. Lectures will be posted on the class website. © 2008 NVIDIA Corporation
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Topics CUDA Intro, Threads & Atomics, Memory Model, ,, y , Atomics, Performance, Parallel Programming, Parallel Patterns. Sparse Matrix Vector, PDE Solvers ase Studies Advanced Optimization Case Studies, Advanced Optimization © 2008 NVIDIA Corporation
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Moore’s Law (paraphrased) “The number of transistors on an integrated circuit doubles every two years.” – Gordon E. Moore © 2008 NVIDIA Corporation
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Moore’s Law (Visualized) GF100 © 2008 NVIDIA Corporation Data credit: Wikipedia
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Buying Performance with Power er Pow e © 2008 NVIDIA Corporation (courtesy Mark Horowitz and Kevin Skadron) Performance
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Serial Performance Scaling is Over Cannot continue to scale processor frequencies pq no 10 GHz chips Cannot
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lec01-introduction_to_massively_parallel_computing - GPU...

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