Test Review 3 - • finding state diagram • reducing...

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2171/T3Rev/MS 1 Review for Test 3 Wednesday, 9 April in class
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2171/T3Rev/MS 2 Logistics • Wednesday, 9 April, in class • One scoop sheet allowed – 8 ½” x 11” both sides • No other written material • No calculators • Take your time; check for mistakes.
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2171/T3Rev/MS 3 Test Conflicts • If you have a conflict with the test, please e-mail me in advance with your availability for a makeup test and an indication of your conflict.
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2171/T3Rev/MS 4 Bring to the Test • Your well-rested, well-studied self • Adequate pencils/pens – pens if you do crossword puzzles in pen • One 8½” x 11” scoop sheet with anything you want on it, both sides.
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2171/T3Rev/MS 5 Do Not Bring to the Test • Books • Calculator • Notes (other than scoop sheet)
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2171/T3Rev/MS 6 Coverage • Chapter 3—Sequential Logic Design – analysis (with any flipflops) – design (with D flipflops)
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Unformatted text preview: • finding state diagram • reducing states • finding flipflop input and circuit output equations • Chapter 4—Hardware Description Languages – combinational and sequential logic • behavioral and structural • if and case statements 2171/T3Rev/MS 7 Likely Problems • 3-5 questions – Analysis of general sequential circuit • Moore/Mealy – Developing a state diagram – Reducing states – Verilog • explain or critique a program • write a simple program in your choice of behavioral or structural – Others similar to homework 2171/T3Rev/MS 8 Advice • Take your time. • Check your work. • Put your class ID on your scoop sheet. • Be sure you can explain flipflop behavior for all four types or put it on your scoop sheet. • Put example Verilog programs on your scoop sheet....
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Test Review 3 - • finding state diagram • reducing...

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