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Unformatted text preview: carry and then 8 times to do the add). Be sure that the test you find works the same whether the initial carry value C(0) is 0 or 1. This can be accomplished by being sure that C(n) is set to X at the start of the test generation. Alternatively, one could set C(n) to 0 initially and use the extended D-algorithm to find a test. Then C(n) would be initialized to 1 and the output from the test pattern would be examined to see if the error on at least one primary output was the same for C(0) = 0 and C(0) = 1. In order for the error to be the same it should be D in both cases or D-bar in both cases (on the same primary output). Show simulation output proving that your test works for both initial values of the carry bit. 2 s-a-0 A ( n ) S ( n ) B ( n ) C ( n + 1 ) C ( n ) F F...
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- Fall '09
- 8-bit, faulty circuit, Testable Design, Digital Systems Test, initial carry value, faulty output