ECE230-syllabus-Summer2010

ECE230-syllabus-Summ - Boise State University Electrical and Computer Engineering Department Course Syllabus for ECE 230 Digital Systems Summer

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1 Boise State University Electrical and Computer Engineering Department Course Syllabus for ECE 230 Digital Systems Summer 2010 Instructor: Arlen Planting Office: ET 227, Phone: (208) 426-4826, Email: [email protected] Office Hours: Monday/Wednesday, 2:00 PM - 4:00 PM; Tuesday/Thursday, 4:30 pm – 5:30 PM; or by appt. Catalog Description: Number systems, Boolean algebra, logic gates, Karnaugh mapping, combinatorial circuits, flip-flops, registers, counters, sequential state-machines. Construction of small design projects. Required text: Text: Stephen Brown, Zvonko Vranesic, Fundamentals of Digital Logic with Verilog Design, 2/e, McGraw Hill, 2008. Design Software: Xilinx ISE 10.1i Time and Place: (Lecture) MTuWTh 11:45 AM to 12:35 PM, MEC 307 Lab: TuTh 1:40 PM to 4:30 PM, ET 312 Course Webpage: http://coen.boisestate.edu/aplanting/ece230summer2010 Topics: 1. Introduction to Digital Design Concepts 2. Switching Algebra & Logic Circuits 3. Optimized Minimization Techniques
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This document was uploaded on 11/02/2011 for the course ECE 230 at Boise State.

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ECE230-syllabus-Summ - Boise State University Electrical and Computer Engineering Department Course Syllabus for ECE 230 Digital Systems Summer

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