ProgrammingSpartan3_8.1i

ProgrammingSpartan3_8.1i - Boise State University...

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Unformatted text preview: Boise State University Department of Electrical and Computer Engineering, EE 230L Programming Spartan-3 FPGA Prototyping Board By no w, you should be fairly co mfortable using ISE schematics capture tool to enter your d esign and Modelsim to simulate your design. If not, you need to be. As an incentive for you to be an expert, we will have a hands-on quiz next week! In previous labs, once the designs have been verified , the designs were built using discrete components (AND, OR, NOT, NAND, NOR, or XOR gates). This is an “old” method to build logic circuits. In fact, this method of building logic circuits is obsolete. Ho wev er, simple logic circuits can still be built using this method (cost effective!). Since, you have learned how to build logic circuits using discrete components; we will be using something more interesting in the lab for the remaining of this semester. You will be programming the FPGA prototyping board using your simulated d esign. The FPGA board has been built with LEDs and switches. To use this FPGA board , you will need to make pin assignment to the input and output signals. For this lab, you will need four s witches (as inputs) and eight LEDs (as outputs). Since the FPGA bo ard that you are using in this lab is an off-the-shelf product, you need to make pin assignment (tie the inputs to switches and outputs to LEDs), synthesize your design, and implement (to a bit file, a FPGA programming file) your design for do wnload to the FPGA. Here are the steps for FPGA pin assignment. 1. Project → New Source → Sel ect I mplementation Cons traints File, enter const at the filename field. 2. Click Next, you need to verify the design file that the constraint file will be associated is what you intended. Click Next. If the file has b een correctly asso ciated to your d esign, click Fi nish. 3. No w click on the “+” next to your design file. You will see the const.ucf added under your design source file. 1 4. No w, click on the “+” next to Us er Constraints in the Processes Sub-Windo w (bottom windo w in the above figure). Then, double clicking on Assign Pa ckage Pins; Xilinx PACE Editor window will appear which allow you to enter th e pin assignment. 5. The pin assignment will be entered into the LOC column of Design Object List – I/ O Plus sub-windo w (bottom left co rner). Input (switches): MSB H13 H14 G12 Output (LEDs ): MSB P11 P12 N12 LSB F12 LSB K12 P13 N14 L12 P14 6. Click Sav e and Exit Xilinx PACE (this is very i mportant!) when you have co mpleted the pin assignment. Select your design file and double clicking on the symbol (up and down arrows make up a circle!) I mplement Design under Processes wind ow. 7. Select Genera te Progra mming File, right mouse bu tton click and choose Property . Under the Startup Option tab, change the FPGA Start-Up Clock fro m CCLK to JTAG Clock. 8. No w, double click on Generate Progra mming File. Go to step 9 when the process is completed. 9. Expand Genera te Progra mming File and double cli ck on Configure Device (i MPACT). 10. It is time to po wer-up the Spartan-3 p rototyping board and connect the programming cable. 11. A welco me windo w appears (i MPACT – Wel come to i MPACT windo w). Accept the default setup by clicking Finis h. No w follo w the screen to download your design to the FPGA. 13. Does the LEDs illuminate exactly you have previously recorded? If so, sho w your wo rk to the instructor. Otherwise, it is going to be a looooooooooooong lab! Once the instructor has ch ecked your work, you can continue with step 14 . 14. Change the pin assignment to the following and recompile. Output (LEDs ): MSB P16 N16 F13 15. Observe LSB E14 R16 P15 N15 G13 2 ...
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This document was uploaded on 11/02/2011 for the course ECE 230 at Boise State.

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