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Unformatted text preview: Digital Systems Laboratory Spring 2011- Syllabus ECE230L Boise State University Electrical and Computer Engineering Department Page 1 ECE 230L - Syllabus Instructor: Arlen Planting Office: MET 227 Phone: 426-4826 Email: email@example.com Office Hours: Mon/Wed/Fri 2:30-3:30pm or by appointment Lab Assistants: Andrew Landoch, Vikram Patel Course Description: Design, build, and test small digital logic circuits using TTL gates, CMOS gates, flip-flops, registers, counters, LED, infrared LEDs, and Xilinx Spartan 3E FPGA. Prerequisites: COMPSCI 117 or COMPSCI 125, Co-requisite: ECE230 Lab Meeting Times: Section 1: Tuesday 9:15 AM to 11:55 AM Engineering Bldg, Rm 312 (ET 312) Section 2: Thursday 9:15 AM to 11:55 AM Engineering Bldg, Rm 312 (ET 312) Required text: No required text. Laboratory instructions are provided on course/laboratory webpage. Course/Lab Webpage: http://coen.boisestate.edu/aplanting/ece230spring2011/ Laboratory Objectives: After taking this laboratory, the students should be able to: Design and build the functions described by given specifications, Analyze and simulate the functions described by logic diagrams, Implement functions in logic gates (TTL and CMOS gates) and FPGA of given specifications,...
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This document was uploaded on 11/02/2011 for the course ECE 230 at Boise State.
- Spring '08