ECE230_S11_Lab02_Readme

ECE230_S11_Lab02_Readme - Email To [email protected]..

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Digital Systems Laboratory Lab 2 ECE230L – Spring 2011 Boise State University Electrical and Computer Engineering Department Page 1 of 1 Lab 2: Putting it Together Objectives: This lab is intended to help you practice what you learned in Labs 0 and 1. This involves using the Xilinx ISE to create a circuit schematic and perform a simulation, then implementing the circuit on the BSU proto-board. Lab Details: Design a circuit that implements the following function: c b a c b a c b a c b a f + + = ) , , ( ! Warning ! : Make sure the design can be implemented with the chips you’ve been given! You will basically be repeating the steps you went through in Labs 0 and 1 - including appropriate unit naming and internal signal truth table verification in simulation. Deliverables: Check-off: TA to check off your completed circuit by end of lab period (11:55 AM) Submission: Due by Midnight Thursday 2/3/2011
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Unformatted text preview: Email: To: [email protected] cc: your team partner Subject: Lab2_TeamX report (X is your team no.) Attachment: Lab2_TeamX.zip (contents as listed below) Attachment: (must be zip format – no others accepted) Contents of zip file: 1. Report File: \Lab2_Team X _Report.pdf Report Content (create in Microsoft Word using template provided) 1. Team number, team member names, lab no. and name 2. Expanded truth table with intermediate signals 3. Schematic capture with caption (re-sized to fit on ¼ page) 4. Waveform screen capture with caption (re-sized to fit on ¼ page) 5. Photograph of your completed wired proto-board 6. Brief paragraph describing results – i.e. do truth tables and waveforms match (reference included figures) After report has been created in Word, create a pdf and then zip....
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This document was uploaded on 11/02/2011 for the course ECE 230 at Boise State.

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