15_Lecutre

15_Lecutre - EE114 Lecture 15 Lecture 15 Voltage Biasing...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
EE114 Lecture 15 R. Dutton, B. Murmann 1 EE114 (HO #19) Lecture 15 Voltage Biasing Considerations R. Dutton, Boris Murmann Stanford University R. Dutton, B. Murmann 2 Recap: Process and Temperature Variations v i V I R i “Transducer” V o V B R I B V B = 2.5V V I = 1.394V I B = 500 μ A W/L = 20 μ m/1 μ m R = 5k Ω R i = 50k Ω The next slide compares .op results using two sets of conditions – Nominal conditions – Fast parameters for NMOS, temperature = -20°C EE114 (HO #19)
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
EE114 Lecture 15 R. Dutton, B. Murmann 3 HSpice .op Output *** .op output (fast, -20degC) element 0:mn1 region Linear id 817.8268u vgs 1.3940 vds 910.8661m vth 402.0530m vod 991.9470m beta 1.6735m gm 1.5243m gds 210.6442u ... *** .op output (nominal) element 0:mn1 region Saturati id 499.6020u vgs 1.3940 vds 2.5020 vth 500.0000m vod 894.0000m beta 1.2502m gm 1.1177m gds 39.9618u ... EE114 (HO #19)
Background image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 11/02/2011 for the course EE 114 taught by Professor Murmann during the Fall '08 term at Stanford.

Page1 / 6

15_Lecutre - EE114 Lecture 15 Lecture 15 Voltage Biasing...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online