17_Lecutre

17_Lecutre - Lecture 17 EE114 Lecture 17 Multi-Stage...

Info iconThis preview shows pages 1–4. Sign up to view the full content.

View Full Document Right Arrow Icon
EE114 Lecture 17 R. Dutton, B. Murmann 1 EE114 (HO #21) Lecture 17 Multi-Stage Amplifiers (Single-Ended) R. Dutton, B. Murmann Stanford University R. Dutton, B. Murmann 2 So, what do we need to think about? •What are constraints? •Source signal/impedance + Load •Gain and Bandwidth requirements •Power budget and Biasing •What is the right technology? •IC or discrete (we’ve discussed in Lect. 1… dc-coupled, IC is our focus) •Other systems issues: •Power supplies (what’s available; head room) •Noise (both intrinsic [see EE214] and chip/board level) Multi-stages--getting started EE114 (HO #21)
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
EE114 Lecture 17 R. Dutton, B. Murmann 3 Reminders about Basics What have we learned (so far) about Stages? •CS, CD: =High Impedance (R in ); A v (some vs. ~1); BW (Miller vs.none) •CG: =Low Impedance (R in ); current buffer; BW(no Miller) Cascode, our first multi-stage: •Way to exploit CG and overcome CS limit (BW); requires extra bias/headroom Biasing •Replicated current-source biasing--both to set gain-stage biasing and for loads--is the best plan. Matching! Ratioed W values EE114 (HO #21) R. Dutton, B. Murmann 4 Cascading (and for what purpose) CS-CD--A V + Output Buffer: •High R in ; Low R out •Modest Gain CS-CS--Lots of A V : •High R in ; moderate/high R out •Gain! •Limits for cascading CG-CS--Trans-Impedance: •Low R in ; moderate/high R out •I-to-V Gain (trans-resist.) Purpose : handle impedances… with appropriate gain EE114 (HO #21)
Background image of page 2
EE114 Lecture 17 R. Dutton, B. Murmann 5 An Example--A Multi-Stage Amplifier Assume a 1 μ A (ac) source (I.e. coming from a photo- diode) that needs to be amplified across a wide bandwidth to a 1V level with a load of 10pF. Observations: Input Current (need a good input buffer for current, that does not load the source very much) How about a unity current gain buffer --very low input impedance and very high output impedance with A I ~1 Output Voltage
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 4
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 11/02/2011 for the course EE 114 taught by Professor Murmann during the Fall '08 term at Stanford.

Page1 / 10

17_Lecutre - Lecture 17 EE114 Lecture 17 Multi-Stage...

This preview shows document pages 1 - 4. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online