Unformatted text preview: Tuesday Monday, April 04, 2011
11:20 PM Labs are not on 5th floor. EBU1‐4307 or EBU2‐203
Pasted from <https://sites.google.com/a/eng.ucsd.edu/ece165/> How is it going? Homework assigned today due in one week.
Are TA office hours OK?
TALK on DIGITAL CIRCUITS RESEARCH TODAY in BOOKER CONFERENCE ROOM AT 3PM April 5, 2010 Page 1 Junction Capacitors
Thursday, March 31, 2011
10:20 AM April 5, 2010 Page 2 April 5, 2010 Page 3 April 5, 2010 Page 4 Drain‐Bulk
Thursday, March 31, 2011
10:18 AM Channelstop implant
N1
A
Side wall
Source W ND
Bottom xj Side wall LS Channel
SubstrateNA April 5, 2010 Page 5 Summary of Capacitances
Tuesday, April 05, 2011
10:20 AM THIS IS FOR A 0.25 um process ‐ NOT WHAT YOUR ARE USING! April 5, 2010 Page 6 April 5, 2010 Page 7 0.2um NMOS MODEL
Thursday, April 08, 2010
10:12 AM .LIB NMOS
* LOT: T26X WAF: 1011
* Temperature_parameters=Default
.MODEL TSMC20N NMOS ( LEVEL = 49
+VERSION = 3.1 TNOM = 27 TOX = 4.1E‐9
+XJ = 1E‐7 NCH = 2.3549E17 VTH0 = 0.3796589
+K1 = 0.5935169 K2 = 2.38533E‐3 K3 = 1E‐3
+K3B = 3.1905105 W0 = 1E‐7 NLX = 1.786849E‐7
+DVT0W = 0 DVT1W = 0 DVT2W = 0
+DVT0 = 1.7203781 DVT1 = 0.4308344 DVT2 = 0.0467521
+U0 = 269.0634518 UA = ‐1.188565E‐9 UB = 1.930877E‐18
+UC = 2.224818E‐11 VSAT = 9.67502E4 A0 = 2
+AGS = 0.4169677 B0 = ‐1.063955E‐8 B1 = ‐1E‐7
+KETA = ‐7.704208E‐3 A1 = 7.99632E‐4 A2 = 0.999873
+RDSW = 105 PRWG = 0.5 PRWB = ‐0.2
+WR = 1 WINT = 2.025957E‐9 LINT = 1.028309E‐8
+XL = ‐2E‐8 XW = ‐1E‐8 DWG = ‐6.4982E‐10
+DWB = 1.217904E‐8 VOFF = ‐0.0901723 NFACTOR = 2.3820479
+CIT = 0 CDSC = 2.4E‐4 CDSCD = 0
+CDSCB = 0 ETA0 = 1.448044E‐3 ETAB = ‐2.754731E‐4
+DSUB = 0.0110906 PCLM = 1.0622551 PDIBLC1 = 0.3172281
+PDIBLC2 = 3.755701E‐3 PDIBLCB = ‐0.1 DROUT = 0.783102
+PSCBE1 = 5.995957E10 PSCBE2 = 5.686023E‐8 PVAG = 0.3568363
+DELTA = 0.01 RSH = 6.7 MOBMOD = 1
+PRT = 0 UTE = ‐1.5 KT1 = ‐0.11
+KT1L = 0 KT2 = 0.022 UA1 = 4.31E‐9
+UB1 = ‐7.61E‐18 UC1 = ‐5.6E‐11 AT = 3.3E4
+WL = 0 WLN = 1 WW = 0
+WWN = 1 WWL = 0 LL = 0
+LLN = 1 LW = 0 LWN = 1
+LWL = 0 CAPMOD = 2 XPART = 0.5
+CGDO = 7.45E‐10 CGSO = 7.45E‐10 CGBO = 1E‐12
+CJ =9.725136E‐4 PB = 0.7292509 MJ = 0.3610145
+CJSW = 2.269386E‐10 PBSW = 0.6351005 MJSW = 0.1
+CJSWG = 3.3E‐10 PBSWG = 0.6351005 MJSWG = 0.1
+CF = 0 PVTH0 = ‐2.139932E‐3 PRDSW = ‐1.2311975
+PK2 = 1.860342E‐3 WKETA = 1.76355E‐3 LKETA = ‐5.667186E‐3
+PU0 = ‐0.2295277 PUA = ‐2.87112E‐11 PUB = 0
+PVSAT = 1.427606E3 PETA0 = 1E‐4 PKETA = ‐1.196986E‐3 ) (Bulk‐source capacitance)
if (Ps > Weff)
Cbs = AS * Cjbs + (PS ‐ Weff) * Cjbssw + Weff *Cjbsswg
else
Cbs = AS * Cjbs + PS * Cjbsswg
Pasted from <http://www.ece.uci.edu/docs/hspice/hspice_2001_2171.html> Cjbs = Cj * (1 + Mj * (Vbs/Pb))
Cjbssw = Cjsw * (1 + Mjsw * (Vbs/Pbsw))
Cjbsswg = Cjswg * (1 + Mjswg * (Vbs/Pbswg))
Pasted from <http://www.ece.uci.edu/docs/hspice/hspice_2001_2171.html> .ENDL NMOS April 5, 2010 Page 8 PARAMETERS OF INTEREST?
TOX
VTH0
Vsat K1
U0 PCLM CGDO, CGDS0, CGB0
CJ, CJSW Thursday, April 08, 2010
10:28 AM Basic Model Parameters
Name Unit Default Bin Description VGSLIM V 0 No Asymptotic Vgs value, Min value is 5V.
0‐value indicates an asymptote of infinity. (Hspice and LEVEL 49 specific) TOX m 150e‐10 No Gate oxide thickness XJ m 0.15e‐6 Yes Junction depth NGATE cm ‐3 0 Yes Poly gate doping concentration VTH0
(VTHO) V 0.7 NMOS Yes
‐0.7 PMOS Threshold voltage of long channel device at Vbs = 0 and small Vds NSUB cm ‐3 6.0e16 Yes Substrate doping concentration NCH cm ‐3 See Note6 1.7e17 Yes Peak doping concentration near interface NLX m 1.74e‐7 Yes Lateral nonuniform doping along channel K1 V 1/2 0.50 Yes First‐order body effect coefficient K2 ‐ ‐0.0186 Yes Second‐order body effect coefficient K3 ‐ 80.0 Yes Narrow width effect coefficient K3B 1/V 0 Yes Body width coefficient of narrow width effect W0 m 2.5e‐6 Yes Narrow width effect coefficient DVT0W 1/m 0 Yes Narrow width coefficient 0, for Vth, at small L DVT1W 1/m 5.3e6 Yes Narrow width coefficient 1, for Vth, at small L DVT2W 1/V ‐0.032 Yes Narrow width coefficient 2, for Vth, at small L DVT0 ‐ 2.2 Yes Short channel effect coefficient 0, for V th DVT1 ‐ 0.53 Yes Short channel effect coefficient 1, for V th DVT2 1/V ‐0.032 Yes Short channel effect coefficient 2, for V th ETA0 ‐ 0.08 Yes Subthreshold region DIBL (drain induced barrier lowering) coefficient ETAB 1/V ‐0.07 Yes Subthreshold region DIBL coefficient DSUB ‐ DROUT Yes DIBL coefficient exponent in subthreshold region VBM V ‐3.0 Yes Maximum substrate bias, for V th calculation U0 cm 2 /V/sec 670 nmos Yes
250 pmos Low field mobility at T = TREF = TNOM UA m/V 2.25e‐9 Yes First‐order mobility degradation coefficient UB m 2 /V 2 5.87e‐19 Yes Second‐order mobility degradation coefficient UC 1/V ‐4.65e‐11 Yes
or ‐0.0465 Body bias sensitivity coefficient of mobility
‐4.65e‐11 for MOBMOD=1,2 or,
‐0.0465 for MOBMOD = 3 A0 ‐ 1.0 Yes Bulk charge effect coefficient for channel length AGS 1/V 0.0 Yes Gate bias coefficient of Abulk B0 m 0.0 Yes Bulk charge effect coefficient for channel width B1 m 0.0 Yes Bulk charge effect width offset April 5, 2010 Page 9 KETA 1/V ‐0.047 Yes Body‐bias coefficient of bulk charge effect VOFF V ‐0.08 Yes Offset voltage in subthreshold region VSAT m/sec 8e4 Yes Saturation velocity of carrier at T = TREF = TNOM A1 1/V 0 Yes First nonsaturation factor A2 ‐ 1.0 Yes Second nonsaturation factor RDSW ohm ∙ µ m 0.0 Yes Parasitic source drain resistance per unit width PRWG 1/V 0 Yes Gate bias effect coefficient of RDSW PRWB 1/V 1/2 0 Yes Body effect coefficient of RDSW WR ‐ 1.0 Yes Width offset from Weff for Rds calculation NFACTO ‐
R 1.0 Yes Subthreshold region swing CIT F/m 2 0.0 Yes Interface state capacitance CDSC F/m 2 2.4e‐4 Yes Drain/source and channel coupling capacitance CDSCD F/Vm 2 0 Yes Drain bias sensitivity of CDSC CDSCB F/Vm 2 0 Yes Body coefficient for CDSC PCLM ‐ 1.3 Yes Coefficient of channel length modulation values <= 0 will result in an error message and program exit. PDIBLC1 ‐ 0.39 Yes DIBL (drain induced barrier lowering) effect coefficient 1 PDIBLC2 ‐ 0.0086 Yes DIBL effect coefficient 2 PDIBLCB 1/V 0 Yes Body effect coefficient of DIBL effect coefficients DROUT ‐ 0.56 Yes Length dependence coefficient of the DIBL correction parameter in R out PSCBE1 V/m 4.24e8 Yes substrate current induced body effect exponent 1 PSCBE2 V/m 1.0e‐5 Yes Substrate current induced body effect coefficient 2 PVAG ‐ 0 Yes Gate dependence of Early voltage DELTA V 0.01 Yes Effective Vds parameter ALPHA0 m/V 0 Yes First parameter of impact ionization current BETA0 V 30 Yes Second parameter of impact ionization current RSH 0.0 ohm/squa No
re Source/drain sheet resistance in ohm per square Pasted from <http://www.ece.uci.edu/docs/hspice/hspice_2001_2171.html> Junction Parameters
Name Unit Default Bin Description ACM ‐ 10 No Area calculation method selector (Hspice specific)
ACM=0‐3 uses Hspice junction models
ACM=10‐13 uses Berkeley junction models
LEVEL 49 ACM defaults to 0 JS A/m2 0.0 No Bulk junction saturation current
(Default deviates from BSIM3v3 = 1.0e‐4) JSW A/m 0.0 No Sidewall bulk junction saturation current NJ ‐ 1 No Emission coefficient (used only with Berkeley junction model, i.e.,ACM=10‐13) April 5, 2010 Page 10 N ‐ 1 CJ F/m2 5.79e‐4 No Zero‐bias bulk junction capacitance
(Default deviates from BSIM3v3 = 5.0e‐4) CJSW F/m 0.0 No Zero‐bias sidewall bulk junction capacitance
(Default deviates from BSIM3v3 = 5.0e‐10) CJSWG F/m CJSW No Zero‐bias gate‐edge sidewall bulk junction capacitance (only used with Berkeley junction model, i.e., ACM=10‐13) CJGATE F/m CJSW No Zero‐bias gate‐edge sidewall bulk junction capacitance (Hspice‐specific) (only used with ACM=3!) PB, PHIB V 1.0 No Bulk junction contact potential PBSW V 1.0 No Sidewall bulk junction contact potential PHP V 1.0 No Sidewall bulk junction contact potential (Hspice‐specific) (only used with Hspice junction model, i.e., ACM=0‐3) PBSWG V PBSW No Gate‐edge sidewall bulk junction contact potential (only used with Berkeley junction model, i.e., ACM=10‐13). Note: there is no equivalent Hspice parameter. Gate‐edge contact potential is always set to PHP for Hspice junction model. MJ ‐ 0.5 No Bulk junction grading coefficient MJSW ‐ 0.33 No Sidewall bulk junction grading coefficient MJSW No Gate‐edge sidewall bulk junction grading coefficient (only used with Berkeley junction model, i.e., ACM=10‐13)
Note: there is no equivalent Hspice parameter. Gate‐edge grading coefficient is always set to MJSW for Hspice junction model. MJSWG ‐ No Emission coefficient (Hspice‐specific), (used only with Hspice junction model, i.e., ACM=
0‐3) Pasted from <http://www.ece.uci.edu/docs/hspice/hspice_2001_2171.html> April 5, 2010 Page 11 Inverter
Thursday, April 08, 2010
9:55 AM V DD V in V out
CL April 5, 2010 Page 12 April 5, 2010 Page 13 CMOS Gate Dynamics
Tuesday, April 05, 2011
10:27 AM VDD VDD tpHL = f(R on.CL) Rp = 0.69 R onCL
Vout Vout CL CL
Rn Vin 5 0
(a) Lowtohigh Vin 5 VDD
(b) Hightolow April 5, 2010 Page 14 Timing Definitions
Tuesday, April 05, 2011
10:28 AM April 5, 2010 Page 15 April 5, 2010 Page 16 Noise Margins
Thursday, March 31, 2011
10:39 AM Vout
VOH VM V in
VOL V IL VIH A simplified approach April 5, 2010 Page 17 ...
View
Full
Document
 Spring '08
 staff

Click to edit the document details