hw-01 - MOV r0, r0, LSR #4 does NOT perform the integer...

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CSE 379 Spring 2009 Homework #1 Due: At the beginning of class on February 3, 2009 1. What values are stored in r0, r1, r4, and r6 after the following instructions have executed? Assume that r0, r1, r4, and r6 contain 0x00000027, 0x00000006, 0x00000010 and 0xFFFFFFFF respectively. Be sure to list r0, r1, r4, and r6 in your answer, even if some values are unchanged. ADD r0, r0, r1 SUB r0, r0, #31 ADD r1, r4, r6 2. Write a single ARM assembly language instruction equivalent to the instruction sequence shown below. MOV r12, r12, LSR #3 EOR r12, r3, r12 3. What values are stored in r0 and r9 after the following instructions have executed? Assume that r0 and r9 contain 0xF1E92615 and 0xAC019356 respectively. Be sure to list both r0 and r9 in your answer, even if some values are unchanged. MVN r0, #18 AND r0, r9, r0 4. Use and example to show why the ARM assembly language instruction
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Unformatted text preview: MOV r0, r0, LSR #4 does NOT perform the integer division of r0 by 16 when r0 initially contains -1424. How should this instruction be modified to perform the operation described above? 5. Write a single ARM assembly language instruction which will multiply an integer stored in r3 by 33, placing the product in r4. 6. Write a single ARM assembly language instruction equivalent to the instruction sequence shown below. MOV r8, #37 SUB r8, r8, r2 7. Write a single line of pseudocode in a high-level language that defines the following ARM assembly language instruction sequence in terms of r0, r1, r3, r5, and r8. SUB r0, r3, r5 ADD r0, r0, r0, LSL #1 ADD r0, r8, r0 8. Write a single line of ARM assembly code which uses the bit clear (BIC) instruction to clear bits 5 and 8 in register r10....
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This document was uploaded on 11/03/2011 for the course CSE 380 at SUNY Buffalo.

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hw-01 - MOV r0, r0, LSR #4 does NOT perform the integer...

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