EE203_Project%201-%20Modified - V s = 40 2 cos 3000t (V) 3....

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Department of Electrical Engineering, University at Buffalo EE 203 : Circuit Analysis (Spring 2008) Project 1 (Due on 03/07/2008) - Modified In this project you are asked to perform sinusoidal steady state analysis of given circuit using PSPICE. The project is due in class on 03/07/2008/Friday. Missed project submission cannot be made up and will result in a grade of zero. TAs will assist you in doing your project during the office and Lab Hours. Objective 1. Use PSPICE to find the magnitude and phase of I , I C and I L . 2. Check the PSPICE results obtained against an analytical solution. Project Description 1. Use PSPICE - Capture Student for the project. 2. Create a circuit as in Figure1. The values of components are shown in table 1.
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Unformatted text preview: V s = 40 2 cos 3000t (V) 3. Insert current and voltage Marker/Probe or Printer at the appropriate position to obtain the results. 4. Use Time Domain Analysis to obtain the output. 5. Simulate the circuit, and compare with analytic result. What to submit 1. A printout of the circuit schematic using PSPICE. 2. Printout of the graph [Do not use PRINT-SCREEN . Use Window b Copy to Clip board option] showing the magnitude. 3. Calculate the phase or use PSPICE. Use MARK Label to highlight the key points which you can then use to calculate the phase. 4. Theoretical derivation of I , I C and I L ....
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This document was uploaded on 11/03/2011 for the course EE 203 at SUNY Buffalo.

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