MIT6_004s09_lec03

MIT6_004s09_lec03 - MIT OpenCourseWare http:/ocw.mit.edu...

Info iconThis preview shows pages 1–4. Sign up to view the full content.

View Full Document Right Arrow Icon
MIT OpenCourseWare http://ocw.mit.edu For information about citing these materials or our Terms of Use, visit: http://ocw.mit.edu/terms . 6.004 Computation Structures Spring 2009
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
L03 - CMOS Technology 1 6.004 – Spring 2009 2/10/09 CMOS Technology 1. Qualitative MOSFET model 2. CMOS logic gates 3. CMOS design issues poly metal pdiff ndiff modified 2/9/09 15:07 NEXT WEEK: ± TUE: no lecture ± THU: Lab 1 due! ± FRI: QUIZ 1!!! L03 - CMOS Technology 2 6.004 – Spring 2009 2/10/09 Combinational Device Wish List ± ± Design our system to tolerate some amount of error ± Add positive noise margins ± VTC: gain>1 & nonlinearity ± ± Lots of gain ± big noise margin ± ± Cheap, small ± ± Changing voltages will require us to dissipate power, but if no voltages are changing, we’d like zero power dissipation ± ± Want to build devices with useful functionality (what sort of operations do we want to perform?) V OL V IL V IH V OH V in V out V in V out L03 - CMOS Technology 3 6.004 – Spring 2009 2/10/09 W L MOSFETS: Gain & non-linearity gate drain source bulk Inter-layer SiO 2 insulation Polysilicon wire Doped (p-type or n-type) silicon substrate Very thin (<20Å) high-quality SiO 2 insulating layer isolates gate from channel region. Heavily doped (n-type or p-type) diffusions Channel region: electric field from charges on gate local y “inverts” type of substrate to create a conducting channel between source and drain. MOSFETs (metal-oxide-semiconductor field-effect transistors) are four- terminal voltage-controlled switches. Current flows between the diffusion terminals if the voltage on the gate terminal is large enough to create a conducting “channel”, otherwise the mosfet is off and the diffusion terminals are not connected. I DS ² W/L L03 - CMOS Technology 4 6.004 – Spring 2009 2/10/09 FETs as switches CONDUCTION: If a channel exists, a horizontal field will cause a drift current from the drain to the source. E h gate INVERSION: A sufficiently strong vertical field will a±ract enough electrons to the surface to create a conducting n- type channel between the source and drain. The gate voltage when the channel first forms is called the threshold voltage -- the mosfet switch goes from “off” to “on”. E v inversion happens here The four terminals of a Field Effect Transistor (gate, source, drain and bulk) connect to conductors that generate a complicated set of electric fields in the channel region which depend on the relative voltages of each terminal. p n n source drain bulk Depletion region (no carriers) forms at PN junction. Self insulating!
Background image of page 2
L03 - CMOS Technology 5 6.004 – Spring 2009 2/10/09 FETs come in two flavors The use of both NFETs and PFETs – complimentary transistor types – is a key to CMOS (complementary MOS) logic families.
Background image of page 3

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Image of page 4
This is the end of the preview. Sign up to access the rest of the document.

Page1 / 7

MIT6_004s09_lec03 - MIT OpenCourseWare http:/ocw.mit.edu...

This preview shows document pages 1 - 4. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online