MIT6_004s09_lec07

# MIT6_004s09_lec07 - MIT OpenCourseWare http/ocw.mit.edu...

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L07 - Synchronization 1 6.004 – Spring 2009 2/26/09 Synchronization, Metastability and Arbitration Due tonight: ± ± Lab #2 ± ± Lab #1 checkoﬀ meeting "If you can't be just, be arbitrary" - Wm Burroughs, Naked Lunch - US Supreme Court 12/00 Did you vote for Bush or Gore? Didn’t have enough time to decide. Well, which hole did you punch? Both, but not very hard. .. modiﬁed 2/23/09 09:30 L07 - Synchronization 2 6.004 – Spring 2009 2/26/09 The Importance of being Discrete Digital Values: Problem: Distinguishing voltages representing “1” from “0” Solution: Forbidden Zone: avoid using similar voltages for “1” and “0” Digital Time: Problem: “Which transition happened ﬁrst?” questions Solution: Dynamic Discipline: avoid asking such questions in close races V OL V IL V IH V OH V OUT V IN V OL V IL V IH V OH t S t H Clk Q D t CD t PD We avoid possible errors by disciplines that avoid asking the tough questions – using a forbidden zone in both voltage and time dimensions: L07 - Synchronization 3 6.004 – Spring 2009 2/26/09 If we follow these simple rules… Can we guarantee that our system will always work? With careful design we can make sure that the dynamic discipline is obeyed everywhere*. .. D Q D Q Out In Combinational logic D Q Out Combinational logic D Q In Clk Combinational logic D Q Combinational logic D Q Combinational logic D Q Out Combinational logic * well, almost everywhere. .. L07 - Synchronization 4 6.004 – Spring 2009 2/26/09 Which edge Came FIRST? The world doesn’t run on our clock! What if each bu±on input is an asynchronous 0/1 level? Lock B1 U B0 0 1 0 1 To build a system with asynchronous inputs, we have to break the rules: we cannot guarantee that setup and hold time requirements are met at the inputs! So, lets use a “synchronizer” at each input: 0 1 (Unsynchronized) U(t) (Synchronized) S(t) Clock Synchronizer Valid except for brief periods following active clock edges But what About the Dynamic Discipline?
L07 - Synchronization 5 6.004 – Spring 2009 2/26/09 The Asynchronous Arbiter: a classic problem Arbiter B C S B: C: at t B C B: C: S: t D t D >t E E t D Arbiter speciﬁcations: ± ﬁnite t D (decision time) ± ﬁnite t E (allowable error) ± value of S at time t C +t D : 1 if t B < t C – t E 0 if t B > t C + t E 0, 1 otherwise CASE 1 CASE 2 CASE 3 UNSOLVABLE For NO ﬁnite value of t E and t D is this spec realizable, even with reliable components! L07 - Synchronization 6 6.004 – Spring 2009 2/26/09 Violating the Forbidden Zone The image cannot be displayed. Your computer may not have enough memory to open the image, or the image may have be n cor upted. Restart your computer, and then open the ﬁle again. If the red x stil appears, you may have to delete the image and then insert it again.

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## This note was uploaded on 11/07/2011 for the course COMPUTER S 6.004 taught by Professor Staff during the Spring '09 term at MIT.

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MIT6_004s09_lec07 - MIT OpenCourseWare http/ocw.mit.edu...

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