MIT6_004s09_lec17

MIT6_004s09_lec17 - MIT OpenCourseWare http:/ocw.mit.edu...

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MIT OpenCourseWare http://ocw.mit.edu For information about citing these materials or our Terms of Use, visit: http://ocw.mit.edu/terms . 6.004 Computation Structures Spring 2009
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L17 – Virtual Memory 1 6.004 – Spring 2009 4/9/09 Virtual Memory You heard me right, kid. TERABYTES of main memory! modified 4/23/09 10:54 Quiz #3 Tomorrow! L17 – Virtual Memory 2 6.004 – Spring 2009 4/9/09 Lessons from History… There is only one mistake that can be made in computer design that is difficult to recover from—not having enough address bits for memory addressing and memory management. Gordon Bell and Bill Strecker speaking about the PDP-11 in 1976 A partial list of successful machines that eventually starved to death for lack of address bits includes the PDP 8, PDP 10, PDP 11, Intel 8080, Intel 8086, Intel 80186, Intel 80286, Motorola 6800, AMI 6502, Zilog Z80, Cray-1, and Cray X-MP. Why? Address size determines minimum width of anything that can hold an address: PC, registers, memory words, HW for address arithmetic (BR/JMP, LD/ST). When you run out of address space it’s time for a new ISA! L17 – Virtual Memory 3 6.004 – Spring 2009 4/9/09 Top 10 Reasons for a BIG Address Space 10. Keeping Micron and Rambus in business. 9. Unique addresses within every internet host. 8. Generating good 6.004 quiz problems. 7. Performing 32-bit ADD via table lookup 6. Support for meaningless advertising hype 5. Emulation of a Turing Machine’s tape. 4. Bragging rights at geek parties. 3. Isolating ISA from IMPLEMENTATION ± details of HW configuration shouldn’t enter into SW design 2. Usage UNCERTAINTY ± provide for run-time expansion of stack and heap 1. Programming CONVENIENCE ± create regions of memory with different semantics: read-only, shared, etc. ± avoid annoying bookkeeping L17 – Virtual Memory 4 6.004 – Spring 2009 4/9/09 Squandering Address Space Address Space CODE, large monolithic programs (eg, Office, Netscape). ... • only small portions might be used • add-ins and plug-ins • shared libraries/DLLs ••• STACK: How much to reserve? (consider RECURSION!) HEAP: N variable-size data records. .. Bound N? Bound Size? OBSERVATIONS: • Can’t BOUND each usage. .. without compromising use. • Actual use is SPARSE • Working set even MORE sparse ± ±
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L17 – Virtual Memory 5 6.004 – Spring 2009 4/9/09 Extending the Memory Hierarchy So, we’ve used SMALL fast memory + BIG slow memory to fake BIG FAST memory. Can we combine RAM and DISK to fake DISK size at RAM speeds? VIRTUAL MEMORY • use of RAM as cache to much larger storage pool, on slower devices • TRANSPARENCY - VM locations "look" the same to program whether on DISK or in RAM. • ISOLATION of RAM size from software.
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This note was uploaded on 11/07/2011 for the course COMPUTER S 6.004 taught by Professor Staff during the Spring '09 term at MIT.

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MIT6_004s09_lec17 - MIT OpenCourseWare http:/ocw.mit.edu...

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