MIT6_004s09_lec18

MIT6_004s09_lec18 - MIT OpenCourseWare http:/ocw.mit.edu...

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MIT OpenCourseWare http://ocw.mit.edu For information about citing these materials or our Terms of Use, visit: http://ocw.mit.edu/terms . 6.004 Computation Structures Spring 2009
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L18 – Virtual Machines 1 6.004 – Spring 2009 4/14/09 Virtual Machines Lab 6 due Thursday! L18 – Virtual Machines 2 6.004 – Spring 2009 4/14/09 Review: Virtual Memory Goal: create illusion of large virtual address space ± divide address into (VPN,offset), map to (PPN,offset) or page fault ± use high address bits to select page: keep related data on same page ± use cache ( TLB ) to speed up mapping mechanism—works well ± long disk latencies : keep working set in physical memory, use write-back PAGEMAP X X X DR Virtual Memory Physical Memory PPN CPU RAM MMU VA PA L18 – Virtual Machines 3 6.004 – Spring 2009 4/14/09 MMU Address Translation Typical Multi-level approach 32 32-bit virtual address 3 Page fault (handled by SW) 1 Look in TLB: VPN ± PPN cache Usually implemented as a small (16- to 64-entry) fully-associative cache 2 Data 20 12 PTBL D R PPN virtual page number 20 12 L18 – Virtual Machines 4 6.004 – Spring 2009 4/14/09 Example I 01 2 -- 0 -- 4 -- 0 -- 11 0 1 -- 0 -- -- 0 -- -- 0 -- -- 0 -- -- 0 -- -- 0 -- 7 6 5 3 Setup: 256 bytes/page (2 8 ) 16 virtual pages (2 4 ) 8 physical pages (2 3 ) 12-bit VA (4 vpn, 8 offset) 11-bit PA (3 ppn, 8 offset) LRU page: VPN = 0xE LD(R31,0x2C8,R0): VA = 0x2C8, PA = _______ 16-entry Page Table 8-page Phys. Mem. D R PPN VPN 0x4 VPN 0x5 VPN 0x0 VPN 0xF VPN 0x2 VPN 0xE VPN 0xD VPN 0xC 0x000 0x0FC 0x100 0x1FC 0x200 0x2FC 0x300 0x3FC 0x400 0x4FC 0x500 0x5FC 0x600 0x6FC 0x700 0x7FC 0x4C8 VPN = 0x2 ± PPN = 0x4 0 1 2 3 4 5 6 7 8 9 A B C D E F 8 4 VA offset VPN 8 3 PPN
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L18 – Virtual Machines 5 6.004 – Spring 2009 4/14/09 Example II 01 2 -- 0 -- 4 -- 0 -- 11 0 1 -- 0 -- -- 0 -- -- 0 -- -- 0 -- -- 0 -- -- 0 -- 7 6 5 3 Setup: 256 bytes/page (2 8 ) 16 virtual pages (2 4 ) 8 physical pages (2 3 ) 12-bit VA (4 vpn, 8 offset) 11-bit PA (3 ppn, 8 offset) LRU page: VPN = 0xE ST(BP,-4,SP), SP = 0x604 VA = 0x600, PA = _______ 16-entry Page Table 8-page Phys. Mem. D R PPN 1 1 5 -- 0 -- VPN 0x4 VPN 0x5 VPN 0x0 VPN 0xF VPN 0x2 VPN 0xE VPN 0xD VPN 0xC 0x000 0x0FC 0x100 0x1FC 0x200 0x2FC 0x300 0x3FC 0x400 0x4FC 0x500 0x5FC 0x600 0x6FC 0x700 0x7FC VPN 0x6 0 1 2 3 4 5 6 7 8 9 A B C D E F 0x500 VPN = 0x6 ± ± Not resident, it’s on disk ± ± Choose page to replace (LRU = 0xE) ± ± D[0xE] = 1, so write 0x500-0x5FC to disk ± ± Mark VPN 0xE as no longer resident ± ± Read in page 0x6 from disk into 0x500-0x5FC ± ± Set up page map for VPN 0x6 = PPN 0x5 ± ± PA = 0x500 ± ± This is a write so set D[0x6] = 1 L18 – Virtual Machines 6 6.004 – Spring 2009 4/14/09 Contexts A context is an entire set of mappings from VIRTUAL to PHYSICAL page numbers as specified by the contents of the page map: We might like to support multiple VIRTUAL to PHYSICAL Mappings and, thus, multiple Contexts. PAGEMAP X X X DR Virtual Memory Physical Memory THE BIG IDEA: Several programs, each with their own context, may be simultaneously loaded into main memory!
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This note was uploaded on 11/07/2011 for the course COMPUTER S 6.004 taught by Professor Staff during the Spring '09 term at MIT.

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MIT6_004s09_lec18 - MIT OpenCourseWare http:/ocw.mit.edu...

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